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K04808BISQ View Datasheet(PDF) - Texas Instruments

Part NameDescriptionManufacturer
K04808BISQ Low-Noise Clock Jitter Cleaner with Dual Loop PLLs TI
Texas Instruments TI
K04808BISQ Datasheet PDF : 139 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LMK04803, LMK04805, LMK04806, LMK04808
SNAS489K – MARCH 2011 – REVISED DECEMBER 2014
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 4
6 Specifications......................................................... 6
6.1 Absolute Maximum Ratings ...................................... 6
6.2 ESD Ratings.............................................................. 6
6.3 Recommended Operating Conditions....................... 6
6.4 Thermal Information .................................................. 7
6.5 Electrical Characteristics........................................... 7
6.6 Timing Requirements .............................................. 13
6.7 Typical Characteristics: Clock Output AC
Characteristics ......................................................... 14
7 Parameter Measurement Information ................ 15
7.1 Charge Pump Current Specification Definitions...... 15
7.2 Differential Voltage Measurement Terminology...... 16
8 Detailed Description ............................................ 17
8.1 Overview ................................................................. 17
8.2 Functional Block Diagram ....................................... 21
8.3 Feature Description................................................. 22
8.4 Device Functional Modes........................................ 43
8.5 Programming........................................................... 47
8.6 Register Maps ......................................................... 51
9 Application and Implementation ........................ 97
9.1 Application Information............................................ 97
9.2 Typical Applications .............................................. 114
9.3 System Examples ................................................. 122
9.4 Do's and Don'ts ..................................................... 124
10 Power Supply Recommendations ................... 125
10.1 Pin Connection Recommendations..................... 125
10.2 Current Consumption and Power Dissipation
Calculations............................................................ 126
11 Layout................................................................. 129
11.1 Layout Guidelines ............................................... 129
11.2 Layout Example .................................................. 130
12 Device and Documentation Support ............... 131
12.1 Device Support.................................................... 131
12.2 Documentation Support ...................................... 131
12.3 Related Links ...................................................... 131
12.4 Trademarks ......................................................... 131
12.5 Electrostatic Discharge Caution .......................... 131
12.6 Glossary .............................................................. 131
13 Mechanical, Packaging, and Orderable
Information ......................................................... 131
4 Revision History
Changes from Revision J (March 2013) to Revision K
Page
• Changed 90 to 80 and 80 to 90 for fCLKout-startup parameter in Electrical Characteristics....................................................... 11
• Added "Specification is not valid for CLKoutX or CLKoutY in analog delay mode" in table note for Electrical
Characteristics ..................................................................................................................................................................... 11
• Changed "Temperature" to "Ambient Temperature" in heading titled "Charge Pump Output Current Magnitude
Variation vs. Ambient Temperature" .................................................................................................................................... 15
• Added "temporarily" in VCXO/CRYSTAL Buffered Outputs ................................................................................................ 18
• Changed from "n possible" to "D possible" in 0-Delay ......................................................................................................... 20
• Changed "can" to "cannot" in Input Clock Switching - Pin Select Mode .............................................................................. 24
• Deleted Clock Switch Event without Holdover in Clock Switch Event with Holdover .......................................................... 25
• Added paragraph beginning "For applications ..." in PLL2 Frequency Doubler ................................................................... 29
• Changed 5 to15 in Table 11 ................................................................................................................................................. 42
• Deleted Mode 5 row in Table 12 .......................................................................................................................................... 43
• Added Mode 15 Additional Configurations section .............................................................................................................. 46
• In Table 16, added [27:26], [23:22], and [21:20] for Register 27 row. Added [31:20] for R28. Added [26:24] for R30.
Added [7:6]. .......................................................................................................................................................................... 51
• In Table 18, changed "Actual PLL2 N divider value used in calibration routine". Added footnote "Inversion for Status
0 and 1 pins is only valid for CLKin_SELECT_MODE = 0x06" ............................................................................................ 56
• In Table 28, added "to reduce supply..." footnote for 9 through 14. Added footnote "To reduce supply switching and
crosstalk noise, it is recommended to use a complementary LVCMOS output type such as 6 or 7". ................................. 64
• Added footnote "To reduce supply" for 8 through 14 in Table 32 ....................................................................................... 66
• Changed "Divide" to "Definition" in Table 39, Table 40, Table 61, and Table 62 ................................................................ 68
• Changed to "MUX OUTPUT" in Table header row in Table 42............................................................................................ 69
• In Table 43, added footnote, "Contact TI Applications for more information on using this mode". Changed to "Dual
2
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