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OP282GP View Datasheet(PDF) - Analog Devices

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OP282GP Datasheet PDF : 12 Pages
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The circuit shown in Figure 3 can be used to accurately
program the “Q,” the cutoff frequency fC, and the gain of a two
pole state-variable filter. OP482s have been used in this design
because of their high bandwidths, low power and low noise.
This circuit takes only three packages to build because of the
quad configuration of the op amps and DACs.
The DACs shown are all used in the voltage mode so all values
are dependent only on the accuracy of the DAC and not on the
absolute values of the DAC’s resistive ladders. This make this
circuit unusually accurate for a programmable filter.
Adjusting DAC 1 changes the signal amplitude across R1;
therefore, the DAC attenuation times R1 determines the
amount of signal current that charges the integrating capacitor,
C1. This cutoff frequency can now be expressed as:
OP282/OP482
fc
=
1
2πR1C1

D1
256

where D1 is the digital code for the DAC.
Gain of this circuit is set by adjusting D3. The gain equation is:
Gain
=
R4
R5

D3
256

DAC 2 is used to set the “Q” of the circuit. Adjusting this DAC
controls the amount of feedback from the bandpass node to the
input summing node. Note that the digital value of the DAC is
in the numerator, therefore zero code is not a valid operating point.
Q
=
R2
R3
256
 D2 
1/4
DAC8408
VIN
R5
-
2k
+
1/4
OP482
R7
2k
R4
2k
1/4
DAC8408
-
+
1/4
OP482
HIGH PASS
R1
-
2k
+
1/4
OP482
C1
1000pF
1/4
DAC8408
-
+
1/4
OP482
C1
1000pF
R1
-
2k
+
1/4
OP482
-
+ LOW
1/4 PASS
OP482
R6
2k
1/4
R3
DAC8408
2k
R2
BANDPASS
-
+
1/4
OP482
1k
-
+
1/4
OP482
Figure 3.
REV. B
–5–
 

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