datasheetbank_Logo   Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site
Part Name :   

LMH0303SQX/NOPB View Datasheet(PDF) - Texas Instruments

Part NameDescriptionManufacturer
LMH0303SQX/NOPB 3-Gbps HD/SD SDI Cable Driver With Cable Detect TI
Texas Instruments TI
LMH0303SQX/NOPB Datasheet PDF : 27 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
www.ti.com
LMH0303
SNLS285H – APRIL 2008 – REVISED MAY 2016
Feature Description (continued)
7.3.1 Loss-of-Signal Detector
The LMH0303 detects when the input signal does not have a video-like pattern. Self-oscillation and low levels of
noise are rejected. This loss-of-signal detector allows a very sensitive input stage that is robust against coupled
noise without any degradation of jitter performance. Through the SMBus, the loss-of-signal detector can either
add an input offset or mute the outputs. An offset is added by default. Additionally, the loss-of-signal detector can
be linked to the ENABLE functionality so that when the LOS goes low, ENABLE also goes low.
7.3.2 Input Interfacing
The LMH0303 accepts either differential or single-ended input. For single-ended operation, the unused input
must be properly terminated.
7.3.3 Output Interfacing
The LMH0303 uses current mode outputs. Single-ended output levels are 800 mVP-P into 75-AC-coupled
coaxial cable with an RREF resistor value of 750 Ω. The RREF resistor is connected between the RREF pin and
VCC.
The RREF resistor should be placed as close as possible to the RREF pin. In addition, the copper in the plane
layers below the RREF network should be removed to minimize parasitic capacitance.
7.3.4 Output Slew Rate Control
The LMH0303 output rise and fall times are selectable for either ST259 or ST 424 or 292 compliance through the
SD/HD pin. For slower rise and fall times, or ST 259 compliance, SD/HD is set high. For faster rise and fall times,
or ST 424 and ST 292 compliance, SD/HD is set low. SD/HD may also be controlled using the SMBus, provided
the SD/HD pin is held low. SD/HD has an internal pulldown.
7.3.5 Cable Fault Detection
The LMH0303 termination fault detection purpose is to provide an indication when no cable is connected to the
output (near end). The termination fault detection works by detecting reflections on the output. The device
measures the peak-to-peak output voltage. The output amplitude is normally 800 mVp-p. No termination results in
2x the output voltage (1600 mVp-p) due to the 100% reflection.
When a video signal (or AC test signal) is present on SDI, the device senses the SDO and SDO amplitudes. If
the output is not properly terminated (through a terminated cable or local termination), the amplitude will be
higher than expected, and the termination fault signal is asserted. The termination fault signal is deasserted
when the proper termination is applied. This feature allows the system designer the flexibility to react to cable
attachment and removal. Note that a long length of cable will look like a proper termination at the device output.
The cable driver must be enabled for the termination detection to operate. If the termination fault will be used to
power down the LMH0303, then periodic polling (enabling) is recommended to monitor the output termination.
For example, when a fault condition is triggered, ENABLE can be driven low to power down the device. The
LMH0303 should be re-enabled periodically to check the status of the output termination. The LMH0303 must be
powered on for at least 4 ms for termination fault detection to work.
7.3.6 SMBus Interface
The System Management Bus (SMBus) is a two-wire interface designed for the communication between various
system component chips. By accessing the control functions of the circuit through the SMBus, pin count is kept
to a minimum while allowing a maximum amount of versatility. The LMH0303 has several internal configuration
registers which may be accessed through the SMBus.
The 7-bit default address for the LMH0303 is 0x17. The LSB is set to 0'b for a WRITE and 1'b for a READ, so
the 8-bit default address for a WRITE is 0x2E and the 8-bit default address for a READ is 0x2F. The SMBus
address may be dynamically changed.
In applications where there might be several LMH0303s, the SDA, SCL, and FAULT pins can be shared. The
SCL, SDA, and FAULT pins are open drain and require external pullup resistors. Multiple LMH0303s may have
the FAULT pin wire ORed. This signal becomes active when either loss of signal is detected or any termination
faults are detected. The registers may be read in order to determine the cause. Additionally, each signal can be
masked from the FAULT pin.
Copyright © 2008–2016, Texas Instruments Incorporated
Submit Documentation Feedback
9
Product Folder Links: LMH0303
Direct download click here
 

Share Link : TI
All Rights Reserved © datasheetbank.com 2014 - 2019 [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]