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LMH0303SQX/NOPB View Datasheet(PDF) - Texas Instruments

Part NameDescriptionManufacturer
LMH0303SQX/NOPB 3-Gbps HD/SD SDI Cable Driver With Cable Detect TI
Texas Instruments TI
LMH0303SQX/NOPB Datasheet PDF : 27 Pages
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LMH0303
SNLS285H – APRIL 2008 – REVISED MAY 2016
www.ti.com
Feature Description (continued)
7.3.6.1 Transfer of Data through the SMBus
During normal operation the data on SDA must be stable during the time when SCL is High.
There are three unique states for the SMBus:
START: A High-to-Low transition on SDA while SCL is High indicates a message START condition.
STOP: A Low-to-High transition on SDA while SCL is High indicates a message STOP condition.
IDLE: If SCL and SDA are both High for a time exceeding tBUF from the last detected STOP condition or if they
are High for a total exceeding the maximum specification for tHIGH, then the bus will transfer to the IDLE state.
7.3.6.2 SMBus Transactions
The device supports WRITE and READ transactions. See Table 1 for register address, type (Read/Write, Read
Only), default value, and function information.
7.3.6.2.1 Writing a Register
To write a register, the following protocol is used (see SMBus 2.0 specification).
1. The Host drives a START condition, the 7-bit SMBus address, and a 0 indicating a WRITE.
2. The Device (Slave) drives the ACK bit (0).
3. The Host drives the 8-bit Register Address.
4. The Device drives an ACK bit (0).
5. The Host drives the 8-bit data byte.
6. The Device drives an ACK bit (0).
7. The Host drives a STOP condition.
The WRITE transaction is completed, the bus goes IDLE, and communication with other SMBus devices may
now occur.
7.3.6.2.2 Reading a Register
To read a register, the following protocol is used (see SMBus 2.0 specification).
1. The Host drives a START condition, the 7-bit SMBus address, and a 0 indicating a WRITE.
2. The Device (Slave) drives the ACK bit (0).
3. The Host drives the 8-bit Register Address.
4. The Device drives an ACK bit (0).
5. The Host drives a START condition.
6. The Host drives the 7-bit SMBus Address, and a 1 indicating a READ.
7. The Device drives an ACK bit 0.
8. The Device drives the 8-bit data value (register contents).
9. The Host drives a NACK bit 1 indicating end of the READ transfer.
10. The Host drives a STOP condition.
7.3.6.3 Communicating With Multiple LMH0303 Cable Drivers through the SMBus
A common application for the LMH0303 uses multiple cable driver devices. Even though the LMH0303 devices
all have the same default SMBus device ID (address), it is still possible for them share the SMBus signals as
shown in Figure 4. A third signal is required from the host to the first device. This signal acts as a Enable or
Reset signal. Additional LMH0303s are controlled from the upstream device. In this control scheme, multiple
LMH0303s may be controlled through the two-wire SMBus and the use of one General Purpose Output (GPO)
signal. Other SMBus devices may also be connected to the two wires, assuming they have their own unique
SMBus addresses.
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