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BQ24153 View Datasheet(PDF) - Texas Instruments

Part NameDescriptionManufacturer
BQ24153 Fully Integrated Switch-Mode One-Cell Li-Ion Charger With Full USB Compliance and USB-OTG Support TI
Texas Instruments TI
BQ24153 Datasheet PDF : 41 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
bq24153
bq24156, bq24158
SLUSA27 – MARCH 2010
www.ti.com
The IC charges the battery in three phases:
conditioning, constant current and constant voltage.
The input current is automatically limited to the value
set by the host. Charge is terminated based on
battery voltage and user-selectable minimum current
level. A safety timer with reset control provides a
safety backup for I2C interface. During normal
operation, The IC automatically restarts the charge
cycle if the battery voltage falls below an internal
threshold and automatically enters sleep mode or
high impedance mode when the input supply is
removed. The charge status can be reported to the
host using the I2C interface. During the charging
process, the IC monitors its junction temperature (TJ)
and reduces the charge current once TJ increases to
about 125°C. To support USB OTG device,
bq24153/8 can provide VBUS (5.05V) by boosting the
battery voltage. The IC is available in 20-pin WCSP
package.
DEVICE SPINS AND COMPARISONS
PART NUMBER
VOVP (V)
D4 Pin Definition
Maximum Charge
Current (A)
Boost Function
Input Current
Limit in 15Min
Mode
Battery Detection
at Power Up
I2C Address
PN1 (bit4 of 03H)
PN0 (bit3 of 03H)
bq24153
6.5
OTG
1.25
bq24156
9.8
SLRST
1.55
bq24158
6.5
OTG
1.25
Yes
100mA
(OTG=LOW);
500mA
(OTG=High)
Yes
No
500mA
Yes
Yes
100mA
(OTG=LOW);
500mA
(OTG=High)
No
6BH
6AH
6AH
1
0
1
0
0
0
PIN LAYOUT (20-Bump YFF Package)
bq24153/8
bq24156
(Top View)
(Top View)
A1
A2
A3
A4
VBUS
VBUS
BOOT
SCL
A1
A2
A3
A4
VBUS
VBUS
BOOT
SCL
B1
PMID
B2
PMID
C1
C2
SW
SW
B3
PMID
C3
SW
B4
SDA
C4
STAT
B1
PMID
C1
SW
B2
PMID
C2
SW
B3
PMID
C3
SW
B4
SDA
C4
STAT
D1
PGND
E1
CSIN
D2
PGND
E2
CD
D3
PGND
D4
OTG
E3
VREF
E4
CSOUT
D1
PGND
E1
CSIN
D2
PGND
E2
CD
D3
PGND
D4
SLRST
E3
VREF
E4
CSOUT
NAME
CSOUT
VBUS
PMID
SW
BOOT
PGND
CSIN
SCL
SDA
PIN
NO.
E4
A1, A2
B1, B2, B3
C1, C2, C3
A3
D1, D2, D3
E1
A4
B4
PIN FUNCTIONS
I/O
DESCRIPTION
I
Battery voltage and current sense input. Bypass it with a ceramic capacitor (minimum 0.1 mF) to PGND if
there are long inductive leads to battery.
I/O
Charger input voltage. Bypass it with a 1-mF ceramic capacitor from VBUS to PGND. It also provides power
to the load during boost mode (bq24153/8 only) .
I/O
Connection point between reverse blocking FET and high-side switching FET. Bypass it with a minimum of
3.3-mF capacitor from PMID to PGND.
O Internal switch to output inductor connection.
I/O
Bootstrap capacitor connection for the high-side FET gate driver. Connect a 10-nF ceramic capacitor (voltage
rating 10 V) from BOOT pin to SW pin.
Power ground
I
Charge current-sense input. Battery current is sensed across an external sense resistor. A 0.1-mF ceramic
capacitor to PGND is required.
I I2C interface clock. Connect a 10-kpullup resistor to 1.8V rail (VAUX=VCC_HOST)
I/O I2C interface data. Connect a 10-kpullup resistor to 1.8V rail (VAUX=VCC_HOST)
2
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