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DRV8308 View Datasheet(PDF) - Texas Instruments

Part NameDescriptionManufacturer
DRV8308 Brushless DC Motor Controller TI
Texas Instruments TI
DRV8308 Datasheet PDF : 59 Pages
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DRV8308
SLVSCF7B – FEBRUARY 2014 – REVISED NOVEMBER 2017
www.ti.com
3.13%, 1.56%, 0.78%, 0.39%, and 0.20% variation per revolution.
• SPEED — In the Internal Register PWM Mode, SPEED divided by 4095 sets the input duty cycle. In Clock
Frequency Mode, SPEED sets the open-loop gain during spin-up before LOCKn goes Low.
The diagram below shows how the lock parameters (MINSPD, SPEEDTH, and SPDREV) affect commutation
mode.
Frequency
HALL_U
SPEEDTH
SPDREVS:
MINSPD and SPEEDTH criteria
meet for the number of electrical
revs before 180 commutation
SPEEDTH:
enable
How much speed variation is allowed
while 180 commutation
MINSPD:
Sets the mim speed that 180°
commutation can be enabled
SPDREVS
ENL_180
H: 180° commutation
L: 120° commutation
Commutation
Table Output
120° Commutation
180° Commutation
120
180
Figure 13. Commutation Parameters
7.3.7 Braking
Motor braking can be initiated by the BRKPOL register bit as well as the BRAKE pin. The BRKPOL register bit
can also be used to program the polarity of the BRAKE pin, as it is combined with the pin with an exclusive-OR
function as follows:
BRAKE PIN
0
0
1
1
Table 4. Brake Behavior
BRKPOL REGISTER
BIT
0
1
0
1
RESULTING
FUNCTION
Not brake
Brake
Brake
Not brake
When the motor is braking, all low-side drivers are held in an on state, causing all low-side FETs to turn on, and
the integrator is reset to 0.
In addition, braking can be entered when the ENABLE pin is made inactive. BRKMOD controls the behavior of
the outputs when ENABLE is inactive. If BRKMOD= 0, the outputs are 3-stated, resulting in the motor coasting; if
BRKMOD = 1, all low-side FETs are turned on, causing the motor to brake.
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