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S25FL064A View Datasheet(PDF) - Spansion Inc.

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S25FL064A Datasheet PDF : 32 Pages
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Data Sheet (Preliminary)
Figure 9.5 Write Disable (WRDI) Command Sequence
CS#
Mode 3
SCK Mode 0
SI
0 12 3 45 6 7
Command
Hi-Z
SO
9.6
Read Status Register (RDSR)
The Read Status Register (RDSR) command outputs the state of the Status Register bits. Table 9.2 shows
the status register bits and their functions.
The RDSR command may be written at any time, even while a program, erase, or Write Status Register
operation is in progress. The host system should check the Write In Progress (WIP) bit before sending a new
command to the device if an operation is already in progress. Figure 9.6 shows the RDSR command
sequence, which also shows that it is possible to read the Status Register continuously until CS# is driven
high.
Table 9.2 S25FL064A Status Register
Bit
Status Register Bit
Bit Function
Description
1 = Protects when W# is low
7
SRWD
Status Register Write Disable
0 = No protection, even when W# is low
6
Not used
5
Not used
4
BP2
3
BP1
2
BP0
Block Protect
000–111 = Protects upper half of address range in 5 sizes. See
Table 7.1.
1
WEL
Write Enable Latch
1 = Device accepts Write Status Register, program, or erase
commands
0 = Ignores Write Status Register, program, or erase commands
0
WIP
Write in Progress
1 = Device Busy. A Write Status Register, program, or erase
operation is in progress
0 = Ready. Device is in standby mode and can accept commands.
Figure 9.6 Read Status Register (RDSR) Command Sequence
CS#
Mode 3
SCK Mode 0
SI
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Command
SO Hi-Z
7654 3 2 107 654 32 107
MSB Status Register Out
MSB Status Register Out
September 6, 2006 S25FL064A_00_C0
S25FL064A
17
 

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