MAX16993 View Datasheet(PDF) - Maxim Integrated
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MAX16993 Datasheet PDF : 0 Pages
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MAX16993
Step-Down Controller with
Dual 2.1MHz Step-Down DC-DC Converters
OUT1 Output Capacitor
The primary purpose of the OUT1 output capacitor is to
reduce the change in VOUT1 during load transient condi-
tions. The minimum capacitor depends on the output volt-
age, maximum current, and load regulation accuracy. Use
the following formula to determine the minimum output
capacitor for Buck 1:
C OUT
≥
2π
×
IOUT1(MAX)
fCO
×
∆VOUT1
VOUT1
×
VOUT1
where fCO is the crossover frequency set by RC and CC,
and ΔVOUT1 is the allowable change in voltage during a
load transient condition.
For proper functionality, ceramic capacitors must be used.
Make sure that the self-resonance of the ceramic capaci-
tors is above 1MHz to avoid instability.
Buck 1 MOSFET Selection
Buck 1 drives two external logic-level n-channel MOSFETs
as the circuit switch elements. The key selection param-
eters to choose these MOSFETs are:
● On-resistance (RDS(ON))
● Maximum drain-to-source voltage (VDS(MAX))
● Minimum threshold voltage (VTH(MIN))
● Total gate charge (QG)
● Reverse transfer capacitance (CRSS)
● Power dissipation
Both n-channel MOSFETs must be logic-level types with
guaranteed on-resistance specifications at VGS = 4.5V
when VOUT1 is set to 5V or VGS = 3V when VOUT1 is set
to 3.3V. The conduction losses at minimum input voltage
should not exceed MOSFET package thermal limits or
violate the overall thermal budget. Also, ensure that the
conduction losses plus switching losses at the maximum
input voltage do not exceed package ratings or violate the
overall thermal budget. In particular, check that the dV/dt
caused by DH1 turning on does not pull up the DL1 gate
through its drain-to-gate capacitance. This is the most
frequent cause of cross-conduction problems.
Gate-charge losses are dissipated by the driver and do
not heat the MOSFET. Therefore, the power dissipation
in the device due to drive losses must be checked. Both
MOSFETs must be selected so that their total gate charge
is low enough; therefore, PV1/ VOUT1 can power both
drivers without overheating the device:
PDRIVE = VOUT1 x (QGTOTH + QGTOTL) x fSW1
where QGTOTL is the low-side MOSFET total gate charge
and QGTOTH is the high-side MOSFET total gate charge.
Select MOSFETs with a QG_ total of less than 10nC.
The n-channel MOSFETs must deliver the average
current to the load and the peak current during switching.
Dual MOSFETs in a single package can be an economical
solution. To reduce switching noise for smaller MOSFETs,
use a series resistor in the DH1 path and additional gate
capacitance. Contact the factory for guidance using gate
resistors.
Compensation Network
The device uses a current-mode-control scheme that
regulates the output voltage by forcing the required
current through the external inductor, so the controller
uses the voltage drop across the DC resistance of the
inductor or the alternate series current-sense resistor
to measure the inductor current. Current-mode control
eliminates the double pole in the feedback loop caused
by the inductor and output capacitor, resulting in a smaller
phase shift and requiring less elaborate error-amplifier
compensation than voltage-mode control. A single series
resistor (RC) and capacitor (CC) is all that is required
to have a stable, high-bandwidth loop in applications
where ceramic capacitors are used for output filtering
(see Figure 4). For other types of capacitors, due to the
higher capacitance and ESR, the frequency of the zero
created by the capacitance and ESR is lower than the
desired closed-loop crossover frequency. To stabilize a
nonceramic output capacitor loop, add another compen-
sation capacitor (CF) from COMP1 to GND to cancel this
ESR zero.
R1
RESR
COUT
R2
CS_
OUT_
gmc = 1/(AVCS x RDC)
CURRENT-MODE
POWER MODULATION
gMEA = 660µS
FB_
VREF
ERROR
AMP
COMP_
30MΩ
RC
CF
CC
Figure 4. Compensation Network
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