CX28C010DMB-15 View Datasheet(PDF) - Intersil
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CX28C010DMB-15 Datasheet PDF : 20 Pages
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X28C010, X28HT010
Software Data Protection
VCC
0V
Data
Addr
AA
5555
CE
55
2AAA
WE
A0
5555
≤ tBLC MAX
tWC
Writes
Ok
Byte
or
Page
(VCC)
Write
Protected
Write Data AA
to Address
5555
Write Data 55
to Address
2AAA
Write Data A0
to Address
5555
FIGURE 6. TIMING SEQUENCE—BYTE OR PAGE WRITE
Regardless of whether the device has previously been
protected or not, once the software data protection algorithm
is used and data has been written, the X28C010/X28HT010
will automatically disable further writes unless another
command is issued to cancel it. If no further commands are
issued the X28C010/X28HT010 will be write protected
during power-down and after any subsequent power-up. The
state of A15 and A16 while executing the algorithm is don’t
care.
Note: Once initiated, the sequence of write operations
should not be interrupted.
Write Data XX
to Any
Address
Write Last
Byte
Last Address
Optional
Byte/Page
Load Operation
After tWC
Re-Enters Data
Protected State
FIGURE 7. WRITE SEQUENCE FOR SOFTWARE DATA
PROTECTION
7
FN8105.1
February 12, 2007
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