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ADXL05AH View Datasheet(PDF) - Analog Devices

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ADXL05AH Datasheet PDF : 20 Pages
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ADXL05
THEORY OF OPERATION
The ADXL05 is a complete acceleration measurement system
on a single monolithic IC. It contains a polysilicon surface-
micro machined sensor and signal conditioning circuitry which
implements a force-balance control loop. The ADXL05 is ca-
pable of measuring both positive and negative acceleration to a
maximum level of ± 5 g.
Figure 16 is a simplified view of the ADXL05’s acceleration
sensor at rest. The actual structure of the sensor consists of 46
unit cells and a common beam. The differential capacitor sensor
consists of independent fixed plates and central plates attached
to the main beam that moves in response to an applied accelera-
tion. The two capacitors are series connected, forming a
capacitive divider with a common movable central plate. The
sensor’s fixed capacitor plates are driven differentially by a
1 MHz square wave: the two square wave amplitudes are equal
but are 180° out of phase from one another. When at rest, the
values of the two capacitors are the same, and therefore, the
voltage output at their electrical center (i.e., at the center plate)
is zero.
CENTER PLATE
BEAM
FIXED
OUTER
PLATES
UNIT CELL
CS1
CS1 = CS2
CS2
DENOTES ANCHOR
Figure 16. A Simplified Diagram of the ADXL05
Sensor at Rest
Figure 17 shows the sensor responding to an applied accelera-
tion. When this occurs, the common central plate or “beam”
moves closer to one of the fixed plates while moving further
from the other. This creates a mismatch in the two capacitances,
resulting in an output signal at the central plate. The output
amplitude of the signal varies directly with the amount of accel-
eration experienced by the sensor.
TOP VIEW
APPLIED
ACCELERATION
CENTER PLATE
BEAM
CS1
CS2
FIXED
OUTER
PLATES
UNIT CELL
CS1 < CS2
DENOTES ANCHOR
Figure 17. The ADXL05 Sensor Momentarily Responding
to an Externally Applied Acceleration
Figure 18 shows a block diagram of the ADXL05. The voltage
output from the central plate of the sensor is buffered and then
applied to a synchronous demodulator which is clocked, in
phase, with the same oscillator that drives the fixed plates
of the sensor. If the applied voltage is in sync and in phase
with the clock, a positive output will result. If the applied volt-
age is in sync but 180° out of phase with the clock, then the
demodulator’s output will be negative. All other signals will be
rejected. An external capacitor, C1, sets the bandwidth of the
demodulator.
DENOTES EXTERNAL
+3.4V
+3.4V
+5V
PIN CONNECTION
75
C2
EXTERNAL
OSCILLATOR
DECOUPLING
CAPACITOR
1MHz
OSCILLATOR
0°
180°
CS1
BEAM
CS2
+1.8V
+5V
+5V
SYNC
+5V
COMMON
VREF
+3.4V
INTERNAL
REFERENCE
+3.4V
+1.8V +0.2V
COM
+0.2V
VIN–
+1.8V
3M
BUFFER
AMPLIFIER
VOUT
33k
C1
33k
PREAMP
EXTERNAL
C1
VPR
DEMODULATION
CAPACITOR
+1.8V
SYNCHRONOUS
DEMODULATOR
LOOP GAIN = 10
RST
INTERNAL
FEEDBACK
LOOP
50k
SELF–TEST
(ST)
+3.4V
Figure 18. Functional Block Diagram
REV. B
–9–
 

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