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Q67100-H3226 View Datasheet(PDF) - Infineon Technologies

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Q67100-H3226 Datasheet PDF : 22 Pages
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SLx 24C08/16
7.3 AC Characteristics
Parameter
Symbol Limit Values Limit Values Units
VCC = 2.7-5.5 V VCC = 4.5-5.5 V
min. max. min. max.
SCL clock frequency
fSCL
100
400 kHz
Clock pulse width low
tlow
4.7
1.2
µs
Clock pulse width high
thigh
4.0
0.6
µs
SDA and SCL rise time
tR
1000 1)
300 ns
SDA and SCL fall time
tF
300
1)
300 ns
Start set-up time
tSU.STA
4.7
0.6
µs
Start hold time
tHD.STA
4.0
0.6
µs
Data in set-up time
tSU.DAT
200
100
ns
Data in hold time
tHD.DAT
0
0
µs
SCL low to SDA data out valid tAA
0.1
4.5
0.1
0.9
µs
Data out hold time
tDH
100
50
ns
Stop set-up time
tSU.STO
4.0
0.6
µs
Time the bus must be free before tBUF
4.7
1.2
µs
a new transmission can start
SDA and SCL spike suppression tl
time at constant inputs
50
100 50
100 ns
1) The minimum rise and fall times can be calculated as follows: 20 + (0.1/pF) × Cb [ns]
Example: Cb = 100 pF tR = 20 + 0.1 × 100 [ns] = 30 ns
7.4 Erase and Write Characteristics
Parameter
Symbol Limit Values Limit Values Units
VCC = 2.7-5.5 V VCC = 4.5-5.5 V
typ. max. typ. max.
Erase + write cycle (per page) tWR
5
8
5
8
ms
Erase page protection bit
2.5 4
2.5 4
ms
Write page protection bit
2.5 4
2.5 4
ms
Semiconductor Group
20
1998-07-27
 

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