MAX1544 View Datasheet(PDF) - Maxim Integrated

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Description

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MAX1544

Dual-Phase, Quick-PWM Controller for AMD Hammer CPU Core Power Supplies

Maxim Integrated 

Dual-Phase, Quick-PWM Controller for

AMD Hammer CPU Core Power Supplies

ELECTRICAL CHARACTERISTICS (continued)

(Circuit of Figure 1, V+ = 15V, VCC = VDD = VSHDN = VTON = VSKIP = VS0 = VS1 = VOVP = 5V, VFB = VCMP = VCMN = VCSP = VCSN =

1.3V, OFS = SUS = GNDS = D0–D4 = GND; TA = -40°C to +100°C, unless otherwise specified.) (Note 5)

PARAMETER

SYMBOL

DL_ Gate-Driver On-Resistance

RON(DL)

VOLTAGE-POSITIONING AMPLIFIER

Input Offset Voltage

Common-Mode Input Voltage

Range

VOS

VCM

Output Voltage Swing

LOGIC AND I/O

SHDN Input High Voltage

VIH

SHDN Input Low Voltage

VIL

Three-Level Input Logic Levels

D0–D4 Logic Input High Voltage

D0–D4 Logic Input Low Voltage

OVP Input High Voltage

OVP Input Low Voltage

CONDITIONS

High state (pullup)

Low start (pulldown)

Guaranteed by CMRR test

|VOAIN+ - VOAIN-| ≥ 10mV,

RL = 1kΩ to VCC/2

VCC - VFBH

VFBL

SUS, SKIP

High

REF

Low

High

Four-Level Input Logic Levels

TON, S0–S1

Open

REF

Low

MIN

-2.0

0

0.8

2.7

1.2

1.6

2.4

VCC -

0.4

3.15

1.65

MAX

4.5

2

UNITS

Ω

+2.0

mV

2.5

V

300

mV

200

V

0.4

V

2.3

V

0.8

V

0.8

V

V

0.8

V

3.85

V

2.35

0.4

Note 2: DC output accuracy specifications refer to the trip level of the error amplifier. When pulse skipping, the output slightly rises

(<0.5%) when transitioning from continuous conduction to no load.

Note 3: On-time and minimum off-time specifications are measured from 50% to 50% at the DHM and DHS pins, with LX_ forced to

GND, BST_ forced to 5V, and a 500pF capacitor from DH_ to LX_ to simulate external MOSFET gate capacitance. Actual in-

circuit times may be different due to MOSFET switching speeds.

Note 4: The output fault-blanking time is measured from the time when FB reaches the regulation voltage set by the DAC code.

During normal operation (SUS = GND), the regulation voltage is set by the VID DAC inputs (D0–D4). During suspend mode

(SUS = REF or high), the regulation voltage is set by the suspend DAC inputs (S0–S1).

Note 5: Specifications to TA = -40°C and +100°C are guaranteed by design and are not production tested.

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