K3296-S View Datasheet(PDF) - NEC => Renesas Technology

Part Name

Description

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K3296-S

SWITCHING N-CHANNEL POWER MOS FET INDUSTRIAL USE

NEC => Renesas Technology 

ELECTRICAL CHARACTERISTICS(TA = 25°C)

CHARACTERISTICS

SYMBOL

TEST CONDITIONS

Drain Leakage Current

IDSS

VDS = 20 V, VGS = 0 V

Gate Leakage Current

IGSS

VGS = ±20 V, VDS = 0 V

Gate Cut-off Voltage

Forward Transfer Admittance

VGS(off)

| yfs |

VDS = 10 V, ID = 1 mA

VDS = 10 V, ID = 18 A

Drain to Source On-state Resistance

RDS(on)1

VGS = 10 V, ID = 18 A

RDS(on)2

VGS = 4.5 V, ID = 18 A

Input Capacitance

Ciss

Output Capacitance

Coss

Reverse Transfer Capacitance

Crss

Turn-on Delay Time

td(on)

Rise Time

tr

Turn-off Delay Time

td(off)

Fall Time

tf

Total Gate Charge

QG

VDS = 10 V

VGS = 0 V

f = 1 MHz

VDD = 10 V , ID = 18 A

VGS(on) = 10 V

RG = 10 Ω

VDD = 16 V

Gate to Source Charge

Gate to Drain Charge

Diode Forward Voltage

QGS

QGD

VF(S-D)

VGS = 10 V

ID = 35 A

IF = 35 A, VGS = 0 V

Reverse Recovery Time

Reverse Recovery Charge

trr

IF = 35 A, VGS = 0 V

Qrr

di/dt = 100 A/µs

2SK3296

MIN.

1.0

9.0

TYP.

8.5

12

1300

570

300

70

1220

100

180

30

4.5

8.0

1.0

35

23

MAX.

10

±10

2.5

12

19

UNIT

µA

µA

V

S

mΩ

mΩ

pF

pF

pF

ns

ns

ns

ns

nC

nC

nC

V

ns

nC

TEST CIRCUIT 1 SWITCHING TIME

D.U.T.

RG

PG.

VGS

0

τ

τ = 1µs

Duty Cycle ≤ 1%

RL

VGS

VGS

Wave Form

10%

0

VGS(on) 90%

VDD

ID

90%

ID

ID

0 10%

Wave Form

90%

10%

td(on) tr td(off) tf

ton

toff

TEST CIRCUIT 2 GATE CHARGE

D.U.T.

IG = 2 mA

RL

PG.

50 Ω

VDD

2

Data Sheet D14063EJ2V0DS

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