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6N135 View Datasheet(PDF) - QT Optoelectronics => Fairchildsemi

Part NameDescriptionManufacturer
6N135 HIGH SPEED TRANSISTOR OPTOCOUPLERS QT
QT Optoelectronics => Fairchildsemi QT
6N135 Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
HIGH SPEED
TRANSISTOR OPTOCOUPLERS
SINGLE-CHANNEL
6N135, 6N136
HCPL-2503
HCPL-4502
DUAL-CHANNEL
HCPL-2530
HCPL-2531
ISOLATION CHARACTERISTICS (TA = 0 to 70°C Unless otherwise specified)
Characteristics
Test Conditions Symbol
Min
Typ**
Max
Unit
(Relative humidity = 45%)
Input-output
insulation leakage current
(TA = 25°C, t = 5 s)
(VI-O = 3000 VDC)
II-O
(Note 9)
1.0
µA
Withstand insulation test voltage
(RH ! 50%, TA = 25°C)
(Note 9) ( t = 1 min.)
VISO
2500
VRMS
Resistance (input to output)
(Note 9) (VI-O = 500 VDC)
RI-O
1012
$
Capacitance (input to output)
(Note 9) (f = 1 MHz)
CI-O
0.6
pF
DC Current gain
(IO = 3 mA, VO = 5 V)
HFE
150
Input-Input
(RH ! 45%, VI-I = 500 VDC) (Note 10)
Insulation leakage current t = 5 s, (HCPL-2530/2531 only)
II-I
0.005
µA
Input-Input Resistance
(VI-I = 500 VDC) (Note 10)
(HCPL-2530/2531 only)
RI-I
1011
$
(f = 1 MHz) (Note 10)
Input-Input Capacitance
(HCPL-2530/2531 only)
CI-I
0.03
pF
** All typicals at TA = 25°C
NOTES
1. Derate linearly above 70°C free-air temperature at a rate of 0.8 mA/°C.
2. Derate linearly above 70°C free-air temperature at a rate of 1.6 mA/°C.
3. Derate linearly above 70°C free-air temperature at a rate of 0.9 mW/°C.
4. Derate linearly above 70°C free-air temperature at a rate of 2.0 mW/°C.
5. Current Transfer Ratio is defined as a ratio of output collector current, IO, to the forward LED input current, IF, times 100%.
6. The 4.1 k$"load represents 1 LSTTL unit load of 0.36 mA and 6.1k$"pull-up resistor.
7. The 1.9 k$"load represents 1 TTL unit load of 1.6 mA and 5.6 k$"pull-up resistor.
8. Common mode transient immunity in logic high level is the maximum tolerable (positive) dVcm/dt on the leading edge of the
common mode pulse signal VCM, to assure that the output will remain in a logic high state (i.e., VO%2.0 V). Common mode transient
immunity in logic low level is the maximum tolerable (negative) dVcm/dt on the trailing edge of the common mode pulse signal, VCM,
to assure that the output will remain in a logic low state (i.e., VO&0.8 V).
9. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together.
10. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together.
200004A
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