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STE53NA50 View Datasheet(PDF) - STMicroelectronics

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Description
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STE53NA50 Datasheet PDF : 0 Pages
STE53NA50
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
S ymb ol
td(on)
tr
P a ra m et er
Turn-on Time
Rise Time
Qg
Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
Test Conditions
VDD = 250 V ID = 27 A
RG = 4.7
VGS = 10 V
(see test circuit, figure 1)
VDD = 400 V ID = 53 A VGS = 10 V
Min.
Typ .
57
92
Max.
80
130
470 658
54
219
Unit
ns
ns
nC
nC
nC
SWITCHING OFF
S ymb ol
tr(Vo f f)
tf
tc
P a ra m et er
Off-voltage Rise Time
Fall Time
Cross-over Time
Test Conditions
VDD = 400 V
ID = 53 A
RG = 4.7
VGS = 10 V
(see test circuit, figure 3)
Min.
Typ .
105
36
145
Max.
145
50
205
Unit
ns
ns
ns
SOURCE DRAIN DIODE
S ymb ol
P a ra m et er
Test Conditions
ISD
ISDM ()
Source-drain Current
Source-drain Current
(pulsed)
VSD () Forward On Voltage
ISD = 53 A
VGS = 0
trr
Reverse Recovery
Time
Qrr
Reverse Recovery
ISD = 53 A di/dt = 100 A/µs
VR = 100 V Tj = 150 oC
(see test circuit, figure 3)
Charge
IRRM Reverse Recovery
Current
() Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
() Pulse width limited by safe operating area
Min.
Typ .
Max.
53
212
Unit
A
A
1.6
V
1000
ns
31.5
µC
63
A
Safe Operating Area for
Thermal Impedance
3/7
 

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