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CAT28F512G-12T View Datasheet(PDF) - Catalyst Semiconductor => Onsemi

Part NameCAT28F512G-12T Catalyst
Catalyst Semiconductor => Onsemi Catalyst
Description512K-Bit CMOS Flash Memory
CAT28F512G-12T Datasheet PDF : 15 Pages
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CAT28F512
READ OPERATIONS
Read Mode
A Read operation is performed with both CE and OE low
and with WE high. VPP can be either high or low,
however, if VPP is high, the Set READ command has to
be sent before reading data (see Write Operations). The
data retrieved from the I/O pins reflects the contents of
the memory location corresponding to the state of the 16
address pins. The respective timing waveforms for the
read operation are shown in Figure 3. Refer to the AC
Read characteristics for specific timing parameters.
Signature Mode
The signature mode allows the user to identify the IC
manufacturer and the type of device while the device
resides in the target system. This mode can be activated
in either of two ways; through the conventional method
of applying a high voltage (12V) to address pin A9 or by
sending an instruction to the command register (see
Write Operations).
The conventional mode is entered as a regular READ
mode by driving the CE and OE pins low (with WE high),
and applying the required high voltage on address pin A9
while all other address lines are held at VIL.
A Read cycle from address 0000H retrieves the binary
code for the IC manufacturer on outputs I/O0 to I/O7:
CATALYST Code = 00110001 (31H)
A Read cycle from address 0001H retrieves the binary
code for the device on outputs I/O0 to I/O7.
28F512 Code = 1011 1000 (B8H)
Standby Mode
With CE at a logic-high level, the CAT28F512 is placed
in a standby mode where most of the device circuitry is
disabled, thereby substantially reducing power con-
sumption. The outputs are placed in a high-impedance
state.
Figure 3. A.C. Timing for Read Operation
POWER UP
STANDBY
DEVICE AND
ADDRESS SELECTION
OUPUTS
ENABLED
DATA VALID STANDBY POWER DOWN
ADDRESSES
CE (E)
OE (G)
WE (W)
DATA (I/O)
HIGH-Z
ADDRESS STABLE
tAVAV (tRC)
tEHQZ (tDF)
tWHGL
tGLQV (tOE)
tGLQX (tOLZ)
tELQX (tLZ)
tGHQZ (tDF)
tELQV (tCE)
tAXQX (tOH)
OUTPUT VALID
HIGH-Z
tAVQV (tACC)
Doc. No. 1084, Rev. H
8
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DESCRIPTION
The CAT28F512 is a high speed 64K x 8-bit electrically erasable and reprogrammable Flash memory ideally suited for applications requiring in-system or after-sale code updates. Electrical erasure of the full memory contents is achieved typically within 0.5 second.
It is pin and Read timing compatible with standard EPROM and EEPROM devices. Programming and Erase are performed through an operation and verify algorithm. The instructions are input via the I/O bus, using a two write cycle scheme. Address and Data are latched to free the I/O bus and address bus during the write operation.

FEATURES
■ Fast Read Access Time: 90/120/150 ns
■ Low Power CMOS Dissipation:
   –Active: 30 mA max (CMOS/TTL levels)
   –Standby: 1 mA max (TTL levels)
   –Standby: 100 µA max (CMOS levels)
■ High Speed Programming:
   –10 µs per byte
   –1 Sec Typ Chip Program
■ 12.0V ± 5% Programming and Erase Voltage
■ Electronic Signature
■ Commercial, Industrial and Automotive Temperature Ranges
■ Stop Timer for Program/Erase
■ On-Chip Address and Data Latches
■ JEDEC Standard Pinouts:
   –32-pin DIP
   –32-pin PLCC
   –32-pin TSOP ( 8 x 20)
■ 100,000 Program/Erase Cycles
■ 10 Year Data Retention
■ "Green" Package Options Available

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