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CAT28F512H-12T View Datasheet(PDF) - Catalyst Semiconductor => Onsemi
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CAT28F512H-12T
512K-Bit CMOS Flash Memory
Catalyst Semiconductor => Onsemi
CAT28F512H-12T Datasheet PDF : 15 Pages
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CAT28F512
Figure 7. Programming Algorithm
(1)
START
PROGRAMMING
APPLY VPPH
INITIALIZE
ADDRESS
PLSCNT = 0
WRITE SETUP
PROG. COMMAND
WRITE PROG. CMD
ADDR AND DATA
BUS
OPERATION
COMMAND
COMMENTS
STANDBY
VPP RAMPS TO VPPH
(OR VPP HARDWIRED)
INITIALIZE ADDRESS
INITIALIZE PULSE COUNT
PLSCNT = PULSE COUNT
1ST WRITE
CYCLE
WRITE
SETUP
DATA = 40H
2ND WRITE
PROGRAM VALID ADDRESS AND DATA
CYCLE
TIME OUT 10
µ
s
WAIT
WRITE PROGRAM
VERIFY COMMAND
1ST WRITE PROGRAM
CYCLE
VERIFY
DATA = C0H
TIME OUT 6
µ
s
WAIT
READ DATA
FROM DEVICE
VERIFY
NO
DATA ?
YES
INCREMENT
ADDRESS
NO
LAST
ADDRESS?
YES
WRITE READ
COMMAND
NO
INC
PLSCNT
= 25 ?
YES
READ
STANDBY
READ BYTE TO VERIFY
PROGRAMMING
COMPARE DATA OUTPUT
TO DATA EXPECTED
1ST WRITE
CYCLE
READ
DATA = 00H
SETS THE REGISTER FOR
READ OPERATION
APPLY VPPL
APPLY VPPL
STANDBY
VPP RAMPS TO VPPL
(OR VPP HARDWIRED)
PROGRAMMING
COMPLETED
PROGRAM
ERROR
Note:
(1) The algorithm MUST BE FOLLOWED to ensure proper and reliable operation of the device.
Doc. No. 1084, Rev. H
12
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