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ACE1202EN View Datasheet(PDF) - Fairchild Semiconductor

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ACE1202EN Datasheet PDF : 39 Pages
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12.0 Brown-out/Low Battery Detect Circuit
The Brown-out Reset (BOR) and Low Battery Detect (LBD)
circuits on the ACEx microcontroller have been designed to offer
two types of voltage reference comparators. The sections below
will describe the functionality of both circuits.
Figure 32: BOR/LBD Block Diagram
Vcc
1.8V
2.2V
0
1
S
BLSEL17
Adjust Reference Voltage
_
BOR
+
_
LBD
+
to RESET logic
LBD
7
6
5
4
3
2
1
0
Control
Register
17 See Figure 14 for information on BLSEL.
12.1 Brown Out Reset 18
The Brown-out Reset (BOR) function is used to hold the device in
reset when VCC drops below a fixed threshold. (See BOR Electri-
cal Characteristics for threshold voltage.) While in reset, the
device is held in its initial condition until VCC rises above the
threshold value. Shortly after VCC rises above the threshold value,
an internal reset sequence is started. After the reset sequence, the
core fetches the first instruction and starts normal operation.
On the devices, the BOR should be used in situations when VCC
rises and falls slowly and in situations when VCC does not fall to
Table 16: LBD Control Register Definition
Bit 7
Bit 6
Bat_trim[2:0]
Bit 5
Bit 4
0
zero before rising back to operating range. The Brown-out Reset
can be thought of as a supplement function to the Power-on Reset
when VCC does not fall below ~1.5V. The Power-on Reset circuit
works best when VCC starts from zero and rises sharply. So in
applications where VCC is not constant, the BOR will give added
device stability.
The BOR circuit must be enabled through the BOR enable bit
(BOREN) in the initialization register. The BOREN bit can only be
set while the device is in programming mode. Once set, the BOR
will always be powered-up enabled. Software cannot disable the
BOR. The BOR can only be disabled in programming mode by
resetting the BOREN bit as long as the global write protect (WDIS)
feature is not enabled.
18 BOR is not available on the P.N. ACE1202B/ACE12022B device
12.2 Low Battery Detect
The Low Battery Detect (LBD) circuit allows software to monitor
the VCC level at the lower voltage ranges. LBD has an eight level
software programmable voltage reference threshold that can be
changed on the fly. Once VCC falls below the selected threshold,
the LBD flag in the LBD control register is set. The LBD flag will
hold its value until VCC rises above the threshold. (See Table 16)
The LBD bit is read only. If LBD is 0, it indicates that the VCC level
is higher than the selected threshold. If LBD is 1, it indicates that
the VCC level is below the selected threshold. The threshold level
can be adjusted up to eight levels using the three trim bits
(Bat_trim[2:0]) of the LBD control register. The LBD flag does not
cause any hardware actions or an interruption of the processor. It
is for software monitoring only.
The LBD function is disabled during HALT/IDLE mode. After
exiting HALT/IDLE, software must wait at least 10 µs before
reading the LBD bit to ensure that the internal circuit has stabi-
lized.
Bit 3
X
Bit 2
X
Bit 1
X
Bit 0
LBD
Level
1
2
3
4
5
6
7
8
Bat_trim[2]
0
0
0
0
1
1
1
1
Bat_trim[1]
0
0
1
1
0
0
1
1
Voltage
Reference
Bat_trim[0] Range (±20%)
0
2.9 - 3.0
1
2.8 - 2.9
0
2.7 - 2.8
1
2.6 - 2.7
0
2.5 - 2.6
1
2.4 - 2.5
0
2.3 - 2.4
1
2.2 - 2.3
32
ACE1202 Product Family Rev. B.1
www.fairchildsemi.com
 

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