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ACE1101LMT8X View Datasheet(PDF) - Fairchild Semiconductor

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ACE1101LMT8X Datasheet PDF : 33 Pages
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5.4 Mode 3: Input Capture Mode
In the input capture mode, the T1 pin is configured as input. The
timer counts down at the instruction clock rate. A transition
received on the T1 pin causes a transfer of the timer contents to
the T1RA register. The input signal on T1 must have a pulse width
equal to or greater than one instruction cycle. (Refer to the AC
Electrical Specifications for this device.) The values captured in
the T1RA register at different times reflect the elapsed time
between transitions on the T1 pin. The input pin can be configured
to sense either positive-going or negative-going transitions.
A block diagram of the timer operating in the input capture mode
is shown in Figure 17.
There are two interrupt events associated with the input capture
mode: input capture in T1RA and timer underflow. If interrupts are
enabled, a Timer1 interrupt is triggered by either an input capture
in T1RA or a timer underflow.
In this operating mode, the T1C0 control bit serves as the timer
underflow interrupt pending flag. The Timer1 interrupt service
routine can look at this flag and the T1PND flag to determine what
caused the interrupt. A set T1C0 flag means that a timer underflow
occurred, whereas a set T1PND flag means that an input capture
occurred in T1RA. It is possible that both flags will be found set,
meaning that both events occurred at the same time. The interrupt
routine should take this possibility into consideration.
Because the T1C0 bit is used as the underflow interrupt pending
flag, it is not available for use as a start/stop bit as in the other modes.
The timer register counts down continuously at the instruction clock
rate, starting from the time that the input capture mode is selected
with bits T1C3-T1C2-T1C1. To stop the timer from running, you
must change from the input capture mode to the PWM or external
event counter mode and reset the T1C0 bit.
The input pins can be independently configured to sense positive-
going or negative-going transitions, resulting in two possible input
capture mode configurations. The edge sensitivity of pin T1 is
controlled by bit T1C1 as indicated in Table 11.
The edge sensitivity of a pin can be changed without leaving the input
capture mode by setting or clearing the appropriate control bit (T1C1),
even while the timer is running. This feature allows you to measure
the width of a pulse received on an input pin. For example, the T1 pin
can be programmed to be sensitive to a positive-going edge. When
the positive edge is sensed, the timer contents are transferred to the
T1RA register, and a Timer1 interrupt is generated. The Timer1
Figure 17: Input Capture Mode
interrupt service routine records the contents of the T1RA register
and also reprograms the input capture mode, changing the T1 pin
from positive to negative edge sensitivity. When the negative-going
edge appears on the T1 pin, another Timer1 interrupt is generated.
The interrupt service routine reads the T1RA register again. The
difference between the previous reading and the current reading
reflects the elapsed time between the positive edge and negative
edge on the T1 input pin, i.e., the width of the positive pulse.
Remember that the Timer1 interrupt service routine must test the
T1C0 and T1PND flags to determine what caused the interrupt.
The software that measures elapsed time must take into account
the possibility that an underflow occurred between the first and
second readings. This can be managed by using the interrupt
triggered by each underflow. The Timer1 interrupt service routine,
after determining that an underflow caused the interrupt, should
record the occurrence of an underflow by incrementing a counter
in memory, or by some other means. The software that calculates
the elapsed time should check the status of the underflow counter
and take it into account in making the calculation.
The following steps can be used to operate the timer in the input
capture mode.
1. Configure the T1 pin as input by clearing bit 2 of PORTG2.
2. With the timer configured to operate in the PWM or external
event counter mode (T1C2 equal to 0), reset the T1C0 bit.
This stops the timer register from counting.
3. Load the initial count into the timer register, typically the
value 0xFFFF to allow the maximum possible number of
counts before underflow.
4. Clear the T1PND interrupt pending flag, then set the T1EN
interrupt enable bit. The G bit should also be set. The
interrupt is now enabled.
5. Write the appropriate value to the timer control bits T1C3-
T1C2- T1C1 to select the input capture mode, and to select
the types of transitions to be sensed on the T1 pin (positive-
going or negative-going; see Table 11). As soon as the input
capture mode is enabled, the timer starts counting.
When the programmed type of edge is sensed on the T1 pin, the
T1RA register is loaded and a Timer1 interrupt is triggered. A
Timer1 interrupt is also triggered when an underflow occurs in the
timer register. The interrupt service routine tests both the T1PND
and T1C0 flags to determine the cause of the interrupt, resets the
pending bit, and performs the required task, such as recording the
T1RA register contents or incrementing an underflow counter.
Internal
Bus
ACE1101 Rev. C.8
16-bit Timer
INT A
INT A
16-bit Input Capture
T1RA
Instruction Clock
Edge Selector T1
Logic
24
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