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ACE1101EX View Datasheet(PDF) - Fairchild Semiconductor

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ACE1101EX Datasheet PDF : 33 Pages
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5.0 Timer 1
Timer1 is a versatile 16-bit timer which can operate in one of three
modes:
• Pulse Width Modulation (PWM) mode, which generates
pulses of a specified width and duty cycle
• External Event Counter mode, which counts occurrences
of an external event
• Standard Input Capture mode, which measures the
elapsed time between occurrences of external events
Timer1 contains a 16-bit timer (counter) register, designated
TMR1, and one 16-bit autoreload (capture) register, designated
T1RA. These 16-bit registers are organized as a pair of 8-bit
memory mapped register bytes, TMR1HI and TMR1LO, and
T1RAHI and T1RALO.
The timer (counter) block uses one I/O pin, designated T1, which
is the alternate function of G2.
Table 10: TIMER1 Control Register Bits
T1CNTRL Register
Bit 7
Bit 6
Bit 5
Bit 4
Name
T1C3
T1C2
T1C1
T1C0
Bit 3
Bit 2
Bit 1
Bit 0
T1PND
T1EN
-----------
-----------
The timer can be started or stopped under program control. When
running, the timer counts down (decrements). Depending on the
operating mode, the timer counts either instruction clock cycles or
transitions on the T1 pin. Occurrences of timer underflows (tran-
sitions from 0x0000 to 0xFFFF) can either generate an interrupt
and/or toggle the T1 pin, also depending on the operating mode.
There is one interrupt associated with the timer, designated the
Timer1 interrupt. When timer interrupt is enabled, the source of the
interrupt depends on the timer operating mode: either a timer
underflow, or a transfer of data to or from the T1RA register. By
default, the timer register is reset to FFFF and the reload register
is reset to 0000.
5.1 Timer control bits
Timer1 is controlled by reading and writing to the T1CNTRL
register. By programming the control bits, the user can enable or
disable the timer interrupts, set the operating mode, and start or
stop the timer. The control bits operate as described in Tables 10
and 11.
Function
Timer TIMER1 control bit 3 (see Table 9)
Timer TIMER1 control bit 2 (see Table 9)
Timer TIMER1 control bit 1 (see Table 9)
Timer TIMER1 run: 1 = Start timer, 0 = Stop timer;
or Timer TIMER1 underflow interrupt pending flag
in input capture mode
Timer1 interrupt pending flag: 1 = Timer1 interrupt
pending, 0 = Timer1 interrupt not pending
Timer1 interrupt enable bit: 1 = Timer1 interrupt enabled,
0 = Timer1 interrupt disabled
Reserved
Reserved
Table 11: TIMER1 Operating Modes
T1 T1 T1
C3 C2 C1
Timer Mode
Interrupt A
Source
0
0
0
MODE 2
TIMER1 Underflow
0
0
1
MODE 2
TIMER1 Underflow
1
0
1
MODE 1 T1 Toggle
Autoreload T1RA
1
0
0
MODE 1 No T1 Toggle
Autoreload T1RA
0
1
0
MODE 3 Captures: T1 Pos. edge
Pos. T1 Edge
0
1
1
MODE 3 Captures: T1 Neg. Edge
Neg. T1 Edge
Timer Counts On
T1 Pos. Edge
T1 Neg. Edge
Instruction Clock
Instruction Clock
Instruction Clock
Instruction Clock
ACE1101 Rev. C.8
21
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