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ACE1101LM8 View Datasheet(PDF) - Fairchild Semiconductor

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ACE1101LM8 Datasheet PDF : 33 Pages
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Direct
The instruction contains an 8-bit address field that directly points
to the data memory for the operand.
Immediate
The instruction contains an 8-bit immediate field as the operand.
Inherent
This instruction has no operand associated with it.
Absolute
This mode is used with the JMP and JSR instructions, with the
instruction field replacing the 10-bits in the program counter. This
allows jumping to any location in the memory map.
Relative
This mode is used for the JP and the bit manipulation instructions,
where the instruction field being added to the program counter to
get the new program location.
Table 7: Instruction Addressing Modes
Instruction
ADC
ADD
AND
OR
SUBC
XOR
Immediate
A, #
A, #
A, #
A, #
A, #
A, #
Direct
A, M
A, M
A, M
A, M
A, M
A, M
CLR
M
INC
M
DEC
M
IFEQ
IFGT
IFNE
IFLT
A, # X, # M,#
A, # X, #
A, #
X, #
A, M
A, M
A, M
SC
RC
IFC
IFNC
INVC
LDC
#, M
STC
#, M
RLC
M
RRC
M
LD
A, # X, # M, #
A, M
ST
A, M
LD
M, M
NOP
IFBIT
#, A
#, M
SBIT
#, M
RBIT
#, M
JP
JSR
JMP
RET
RETI
INTR
Indexed
Indirect
A, [X]
A, [X]
A, [X]
A, [X]
A, [X]
A, [X]
A
X
A
X
A
X
A, [X]
A, [X]
A, [X]
Inherent Relative Absolute
no-op
no-op
no-op
no-op
no-op
A, [00,X]
A, [00,X]
A, [X]
A, [X]
#, [X]
#, [X]
A
A
no-op
no-op
no-op
no-op
Rel
M,M+1
M,M+1
ACE1101 Rev. C.8
17
www.fairchildsemi.com
 

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