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74VCX00 View Datasheet(PDF) - Fairchild Semiconductor

Part NameDescriptionManufacturer
74VCX00 Low Voltage Quad 2-Input NAND Gate with 3.6V Tolerant Inputs and Outputs Fairchild
Fairchild Semiconductor Fairchild
74VCX00 Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
DC Electrical Characteristics (Continued)
Symbol
Parameter
VOL
LOW Level Output Voltage
II
Input Leakage Current
IOZ
3-STATE Output Leakage
IOFFI
ICC
Power-OFF Leakage Current
Quiescent Supply Current
'ICC
Increase in ICC per Input
Note 6: Outputs disabled or 3-STATE only.
Conditions
IOL 100 PA
IOL 12 mA
IOL 18 mA
IOL 24 mA
IOL 100 PA
IOL 12 mA
IOL 18 mA
IOL 100 PA
IOL 6 mA
IOL 100 PA
IOL 2 mA
IOL 100 PA
0 d VI d 3.6V
0 d VO d 3.6V
VI VIH or VIL
0 d (VI, VO) d 3.6V
VI VCC or GND
VCC d (VI, VO) d 3.6V (Note 6)
VIH VCC 0.6V
VCC
Min
(V)
2.7 - 3.6
2.7
3.0
3.0
2.3 - 2.7
2.3
2.3
1.65 - 2.3
1.65
1.4 - 1.6
1.4
1.2
1.4 - 3.6
1.4 - 3.6
0
1.4 - 3.6
1.4 - 3.6
2.7 - 3.6
Max
Units
0.2
0.4
0.4
0.55
0.2
0.4
V
0.6
0.2
0.3
0.2
0.35
0.05
r5.0
PA
r10
PA
10
PA
20
PA
r20
750
PA
AC Electrical Characteristics (Note 7)
Symbol
Parameter
Conditions
VCC TA 40qC to 85qC
Figure
Units
(V)
Min
Max
Number
tPHL,
tPLH
Propagation Delay
CL 30 pF, RL 500:
3.3 r 0.3
0.6
2.8
2.5 r 0.2
0.8
3.7
Figures
1, 2
1.8 r 0.15 1.0
7.4
ns
CL 15 pF, RL 2k:
1.5 r 0.1
1.0
14.8
1.2
1.5
37.0
Figures
3, 4
tOSHL
tOSLH
Output to Output Skew
(Note 8)
CL 30 pF, RL 500:
3.3 r 0.3
2.5 r 0.2
1.8 r 0.15
0.5
0.5
0.75
ns
CL 15 pF, RL 2k:
1.5 r 0.1
1.5
1.2
1.5
Note 7: For CL 50PF, add approximately 300 ps to the AC maximum specification.
Note 8: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).
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