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74LV4316N View Datasheet(PDF) - Philips Electronics

Part NameDescriptionManufacturer
74LV4316N Quad bilateral switches Philips
Philips Electronics Philips
74LV4316N Datasheet PDF : 16 Pages
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Philips Semiconductors
Quad bilateral switches
Product specification
74LV4316
FEATURES
DESCRIPTION
Optimized for Low Voltage applications: 1.0V to 6.0V
Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V
Low typ “ON” resistance:
80W at VCC – VEE = 4.5V
120W at VCC – VEE = 3.0V
295W at VCC – VEE = 2.0V
Logic level translation: to enable 3V logic to communicate
with "3V analog signals
Typical “break before make” built in
Output capability: non-standard
ICC category: MSI
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25°C; tr =tf v 2.5 ns
SYMBOL
PARAMETER
The 74LV4316 is a low-voltage CMOS device that is pin and
function compatible with 74HC/HCT4316.
The 74LV4316 has four independent analog switches. Each switch
has two input/output terminals (nY, nZ) and an active HIGH select
input (nS). When the enable input (E) is HIGH, all four analog
switches are turned off.
Current through a switch will not cause additional VCC current provided
the voltage at the terminals of the switch is maintained within the
supply voltage range; VCC > (VY, VZ) > VEE. Inputs nY and nZ are
electrically equivalent terminals. VCC and GND are the supply voltage
pins for the digital control inputs (E and nS). The VCC to GND ranges
are 1.0 to 6.0 V.
The analog inputs/outputs (nY and nZ) can swing between VCC as a
positive limit and VEE as a negative limit.
VCC – VEE may not exceed 6.0 V.
CONDITIONS
TYPICAL
UNIT
tPZH/tPZL
Turn “ON” time:
E to VOS
nS to VOS
CL = 15pF
RL = 1KW
VCC= 3.3V
19
ns
tPHZ/tPLZ
Turn “OFF” time:
E to VOS
nS to VOS
20
ns
CI
Input capacitance
3.5
pF
CPD
Power dissipation capacitance per switch Notes 1, 2
13
pF
CS
Maximum switch capacitance
5
pF
NOTES:
1. CPD is used to determine the dynamic power dissipation (PD in µW)
PD = CPD × VCC2 × fi (CL × VCC2 × fo) where:
fi = input frequency in MHz; CL = output load capacity in pF;
fo = output frequency in MHz; VCC = supply voltage in V;
VCC = supply voltage in V:
ȍ (CL × VCC2 × fo) = sum of the outputs.
2. The condition is VI = GND to VCC.
ORDERING INFORMATION
PACKAGES
16-Pin Plastic DIL
16-Pin Plastic SO
16-Pin Plastic SSOP Type II
16-Pin Plastic TSSOP Type I
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
–40°C to +125°C
74LV4316 N
–40°C to +125°C
74LV4316 D
–40°C to +125°C
74LV4316 DB
–40°C to +125°C
74LV4316 PW
NORTH AMERICA
74LV4316 N
74LV4316 D
74LV4316 DB
74LV4316PW DH
PKG. DWG. #
SOT38-4
SOT109-1
SOT338-1
SOT403-1
PIN CONFIGURATION
1Z 1
1Y 2
2Y 3
2Z 4
2S 5
3S 6
E7
GND 8
16 VCC
15 1S
14 4S
13 4Z
12 4Y
11 3Y
10 3Z
9 VEE
SV01650
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
FUNCTION
1, 4, 10, 13 1Z – 4Z Independent inputs/outputs
2, 3, 11, 12 1Y – 4Y Independent inputs/outputs
7
E
Enable input (active LOW)
8
GND Ground (0V)
9
15, 5, 6, 14
VEE Negative supply voltage
1S – 4S Select inputs (active HIGH)
16
VCC Positive supply voltage
1998 Jun 23
2
853-2079 19619
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