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N140B6-L02 View Datasheet(PDF) - Unspecified

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N140B6-L02 Datasheet PDF : 28 Pages
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Doc No.: 44087312
Issued Date: Oct, 20, 2008
Model No.: N140B6 -L02
Approval
7 INTERFACE TIMING
7.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal
DCLK
DE
Item
Frequency
Vertical Total Time
Vertical Active Display Period
Vertical Active Blanking Period
Horizontal Total Time
Horizontal Active Display Period
Horizontal Active Blanking Period
Symbol
1/Tc
TV
TVD
TVB
TH
THD
THB
Min.
57
769
768
TV-TVD
1370
1366
TH-THD
Typ.
75.44
806
768
38
1560
1366
194
Max.
79
1200
768
TV-TVD
1960
1366
TH-THD
Unit
MHz
TH
TH
TH
Tc
Tc
Tc
Note (1) Because this module is operated by DE only mode, Hsync and Vsync are ignored
Note
DE
DCLK
DE
DATA
INPUT SIGNAL TIMING DIAGRAM
Tv
TVD
TH
TC
THD
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Version 2.0
 

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