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VDS7616A4A-55 View Datasheet(PDF) - A-Data Technology

Part Name
Description
View to exact match
VDS7616A4A-55
A-Data
A-Data Technology A-Data
VDS7616A4A-55 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
V-Data
Synchronous DRAM
VDS7616A4A
2M x 16 Bit x 4 Banks
General Description
The VDS7616A4A are four-bank Synchronous
DRAMs organized as 2,097152 words x 16 bits x 4
banks.
Synchronous design allows precise cycle control
with the use of system clock I/O transactions are
possible on every clock cycle.
Range of operating frequencies, programmable
burst length and programmable latencies allow the
same device to be useful for a variety of high
bandwidth high performance memory system
applications
Features
JEDEC standard LVTTL 3.3V power supply
MRS Cycle with address key programs
-CAS Latency (2 & 3)
-Burst Length (1,2,4,8,& full page)
-Burst Type (sequential & Interleave)
4 banks operation
All inputs are sampled at the positive edge of
the system clock
Burst Read single write operation
Auto & Self refresh
4096 refresh cycle
DQM for masking
Package:54-pins 400 mil TSOP-Type II
Ordering Information.
Part No.
Frequency
Interface
Package
VDS7616A4A-55
183Mhz
LVTTL
400mil 54pin TSOPII
VDS7616A4A-6
166Mhz
LVTTL
400mil 54pin TSOPII
VDS7616A4A-7
Pin Assignment
143Mhz
LVTTL
400mil 54pin TSOPII
VDD
1
DQ0
2
VDDQ
3
DQ1
4
DQ2
5
VSSQ
6
DQ3
7
DQ4
8
VDDQ
9
DQ5
10
DQ6
11
VSSQ
12
DQ7
13
VDD
14
LDQM
15
/WE
16
/CAS
17
/RAS
18
/CS
19
BS0
20
BS1
21
A10/AP
22
A0
23
A1
24
A2
25
A3
26
VDD
27
54
Vss
53
DQ15
52
VssQ
51
DQ14
50
DQ13
49
VDDQ
48
DQ12
47
DQ11
46
VSSQ
45
DQ10
44
DQ9
43
VDDQ
42
DQ8
41
VSS
40
NC
39
UDQM
38
CLK
37
CKE
36
NC
35
A11
34
A9
33
A8
32
A7
31
A6
30
A5
29
A4
28
VSS
54-pin plastic TSOP II 400 mil
Rev 1.0 April, 2001
1
 

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