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RLD03N06CLE View Datasheet(PDF) - Intersil

Part Name
Description
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RLD03N06CLE Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
RLD03N06CLE, RLD03N06CLESM, RLP03N06CLE
Typical Performance Curves Unless Otherwise Specified (Continued)
60
5.00
45
VDD = BVDSS
3.75
30
2.50
0.75 BVDSS
RL = 600
IG(REF) = 0.1mA
15
0.50 BVDSS
0.25 BVDSS
VGS = 5V
1.25
0
0.00
10 I-I-GG-----((--AR----CE----FT----))
t, TIME (µs) 40 I-I-GG-----((--AR----CE----FT----))
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 12. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT.
Test Circuits and Waveforms
VDD
RL
VDS
VDS
tON
td(ON)
tr
90%
tOFF
td(OFF)
tf
90%
VGS
0V
RGS
DUT
10%
VGS
10%
50%
PULSE WIDTH
10%
90%
50%
FIGURE 13. RESISTIVE SWITCHING TEST CIRCUIT
Detailed Description
Temperature Dependence of Current Limiting and
Switching Speed Performance
The RLD03N06CLE, CLESM and RLP03N06CLE are
monolithic power devices which incorporate a Logic Level power
MOSFET transistor with a current sensing scheme and control
circuitry to enable the device to self limit the drain source current
flow. The current sensing scheme supplies current to a resistor
that is connected across the base to emitter of a bipolar transistor
in the control section. The collector of this bipolar transistor is
connected to the gate of the power MOSFET transistor. When
the ratiometric current from the current sensing reaches the
value required to forward bias the base emitter junction of this
bipolar transistor, the bipolar “turns on”. A resistor is incorporated
in series with the gate of the power MOSFET transistor allowing
the bipolar transistor to adjust the drive on the gate of the power
MOSFET transistor to a voltage which then maintains a constant
current in the power MOSFET transistor. Since both the
ratiometric current sensing scheme and the base emitter unction
FIGURE 14. RESISTIVE SWITCHING WAVEFORMS
voltage of the bipolar transistor vary with temperature, the current
at which the device limits is a function of temperature. This
dependence is shown in Figure 3.
The resistor in series with the gate of the power MOSFET
transistor also results in much slower switching performance
than in standard power MOSFET transistors. This is an
advantage where fast switching can cause EMI or RFI. The
switching speed is very predictable.
DC Operation
The limit on the drain to source voltage for operation in
current limiting on a steady state (DC) basis is shown in the
equation below. The dissipation in the device is simply the
applied drain to source voltage multiplied by the limiting
current. This device, like most power MOSFET devices
today, is limited to 175oC. The maximum voltage allowable
can, therefore, be expressed as shown in Equation 1:
DS = (--I-1-L--5-M---0---°---C-(--R--–--θ-T--J--A-C---M---+--B--R--I--Eθ---J-N--A--T--)--)
(EQ. 1)
6-422
 

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