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GT-6816 View Datasheet(PDF) - Unspecified

Part Name
Description
View to exact match
GT-6816
ETC
Unspecified ETC
GT-6816 Datasheet PDF : 63 Pages
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V. Pin Descriptions-
GT-6816
128 No. 44 No. Name Reset State Type Driven
Description
1
MD4
Tri-state I/O 4mA External memory data bus bit 4
2
MD5
Tri-state I/O 4mA External memory data bus bit 5
3
43 SHS
Tri-state O 8mA CCD sample hold signal control signal
4
MD6
Tri-state I/O 4mA External memory data bus bit 6
5
GNDC1
P
Core ground
6
44 SHB
Tri-state O 8mA CCD sample hold reset control signal
7
MD7
Tri-state I/O 4mA External memory data bus bit 7
8
MOE#
High
O 4mA External memory output enable
9
MWE#
High
O 4mA External memory write enable
10
1
H2/CLK Tri-state O 8mA CCD shift clock/CIS clock control signal
11
PORT1_0 Tri-state I/O 4mA uP port 1 bit 0
12
PORT1_1 Tri-state I/O 4mA uP port 1 bit 1
13
2
H1/SP
Tri-state O 8mA CCD shift clock/CIS SP control signal
14
VDDC1
P
Core power
15
PORT1_2 Tri-state I/O 4mA uP port 1 bit 2
16
PORT1_3 Tri-state I/O 4mA uP port 1 bit 3
17
PLL_EN#
I
PLL enable control signal, with pull-down, not
18
3
VDDP
P
PLL power
19
4
X1
I
Crystal input
20
5
X2
O
Crystal output
21
6
GNDP
P
PLL ground
22
GNDC2
P
Core ground
23
GPIO1
Tri-state I/O 4mA GPIO bit 1
24
GPIO2
Tri-state I/O 4mA GPIO bit 2
25
GPIO3
Tri-state I/O 4mA GPIO bit 3
26
GNDC3
P
Core ground
27
7
RS
Tri-state O 8mA CCD reset signal
28
PORT1_4 Tri-state I/O 4mA uP port 1 bit 4
29
8
WAKEUP
I
USB device remoter wakeup
30
PORT1_5 Tri-state I/O 4mA uP port 1 bit 5
31
9
TGB/LEDB Tri-state O 8mA CCD TG/CIS LED B channel control signal
32
PORT1_6 Tri-state I/O 4mA uP port 1 bit 6
33
10 TGG/LEDG Tri-state O 8mA CCD TG/CIS LED G channel control signal
34
PORT71_ Tri-state I/O 4mA uP port 1 bit 7
35
GPIO0
Tri-state I/O 4mA GPIO bit 0
36
GPIO4
Tri-state I/O 4mA GPIO bit 4
37
11 TGR/LEDR Tri-state O 8mA CCD TG/CIS LED R channel control signal
38
VDDC2
P
Core power
39
12 RESET
I
Power on reset, high active
40
GPIO5
Tri-state I/O 4mA GPIO bit 5
41
13 GPIO6
Tri-state I/O 4mA GPIO bit 6
42
14 VDDC3
P
Core power
43
GPIO7
Tri-state I/O 4mA GPIO bit 7
44
15 DBUSY
I
Device parallel port (Busy) signal, with
4
 

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