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GT-6816 View Datasheet(PDF) - Unspecified

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Description
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GT-6816
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GT-6816 Datasheet PDF : 63 Pages
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GT-6816
7:0 8’b0 DMA1 transfer byte count low byte
Note:
DMA1 transfer bytes count indicates the total bytes that will be transferred from M2 to
M1. Before DMA1 is active, set these two registers first.
DMA1 M1 starting address high byte register
CPU Read/Write
Address: FF83H
Bit Reset Description
7:0 8’b0 M1 starting address high byte
DMA1 M1 starting address low byte register
CPU Read/Write
Address: FF84H
Bit Reset Description
7:0 8’b0 M1 starting address low byte
Note:
DMA1 starting address indicates the initial address when DMA1 is on going. Address is
automatically increment by one when one byte transfer is done.
DMA M2 starting address high byte register
CPU Read/Write
Address: FF85H
Bit Reset Description
7:0 8’b0 M2 starting address high byte
DMA M2 starting address high byte register
CPU Read/Write
Address: FF86H
Bit Reset Description
7:0 8’b0 M2 starting address low byte
Note:
These two registers define the M2 starting address when DMA1 or DMA2 transfer are
enable. Note that these two registers are changed on the fly during DMA1 and DMA2. Be
careful to set the real initial address before DMA1 or DMA2 is enable.
DMA2 valid byte count high register
CPU Read/Write
Bit Reset Description
7:0 8’b0 DMA2 valid byte count high byte
31
 

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