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TDA8359 View Datasheet(PDF) - Unspecified

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Description
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TDA8359 Datasheet PDF : 20 Pages
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Philips Semiconductors
Full bridge vertical deflection output circuit
in LVDMOS
Product specification
TDA8359J
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
PARAMETER
VP
supply voltage
VFB
flyback supply voltage
Vn
DC voltage
pin OUTA
pin OUTB
pins INA, INB, GUARD and FEEDB
In
DC current
pins OUTA and OUTB
pins OUTA and OUTB
pins INA, INB, GUARD and FEEDB
Ilu
latch-up current
Ves
Ptot
Tstg
Tamb
Tj
electrostatic handling voltage
total power dissipation
storage temperature
ambient temperature
junction temperature
CONDITIONS
MIN.
note 1
0.5
during scan (p-p)
at flyback (peak); t 1.5 ms
current into any pin; pin voltage is
1.5 × VP; note 2
current out of any pin; pin voltage is
1.5 × VP; note 2
machine model; note 3
human body model; note 4
note 5
20
200
500
5 000
55
25
Notes
1. When the voltage at pin OUTA supersedes 70 V the circuit will limit the voltage.
2. At Tj(max).
3. Equivalent to 200 pF capacitance discharge through a 0 resistor.
4. Equivalent to 100 pF capacitance discharge through a 1.5 kresistor.
5. Internally limited by thermal protection at Tj = 170 °C.
MAX.
18
68
68
VP
VP
3.2
±1.8
+20
+200
+500
+5 000
10
+150
+85
150
UNIT
V
V
V
V
V
A
A
mA
mA
mA
V
V
W
°C
°C
°C
THERMAL CHARACTERISTICS
In accordance with IEC 60747-1.
SYMBOL
PARAMETER
Rth(j-c)
Rth(j-a)
thermal resistance from junction to case
thermal resistance from junction to ambient
CONDITIONS
in free air
MAX.
3
65
UNIT
K/W
K/W
2002 Jan 21
5
 

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