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AD9608 View Datasheet(PDF) - Analog Devices

Part Name
Description
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AD9608 Datasheet PDF : 40 Pages
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VIN
CLK+
CLK–
DCO–
DCO+
PARALLEL
INTERLEAVED
MODE
D0+ (LSB)
D0– (LSB)
D9+ (MSB)
D9– (MSB)
CHANNEL
MULTIPLEXED
MODE
CHANNEL A
D1+/D0+ (LSB)
D1–/D0– (LSB)
D9+/D8+ (MSB)
D9–/D8– (MSB)
CHANNEL
MULTIPLEXED
MODE
CHANNEL B
D1+/D0+ (LSB)
D1–/D0– (LSB)
D9+/D8+ (MSB)
D9–/D8– (MSB)
AD9608
N–1
tCH
tA
N
N+1
tCLK
N+2
N+3
N+4
N+5
tDCO
tPD
tSKEW
CH A CH B CH A CH B CH A CH B CH A CH B CH A
N – 16 N – 16 N – 15 N – 15 N – 14 N – 14 N – 13 N – 13 N – 12
CH A CH B CH A CH B CH A CH B CH A CH B CH A
N – 16 N – 16 N – 15 N – 15 N – 14 N – 14 N – 13 N – 13 N – 12
CH A0 CH A1 CH A0 CH A1 CH A0 CH A1 CH A0 CH A1 CH A0
N – 16 N – 16 N – 15 N – 15 N – 14 N – 14 N – 13 N – 13 N – 12
CH A8 CH A9 CH A8 CH A9 CH A8 CH A9 CH A8 CH A9 CH A8
N – 16 N – 16 N – 15 N – 15 N – 14 N – 14 N – 13 N – 13 N – 12
CH B0 CH B1 CH B0 CH B1 CH B0 CH B1 CH B0 CH B1 CH B0
N – 16 N – 16 N – 15 N – 15 N – 14 N – 14 N – 13 N – 13 N – 12
CH B8 CH B9 CH B8 CH B9 CH B8 CH B9 CH B8 CH B9 CH B8
N – 16 N – 16 N – 15 N – 15 N – 14 N – 14 N – 13 N – 13 N – 12
Figure 4. LVDS Modes for Data Output Timing
CLK+
SYNC
tSSYNC
tHSYNC
Figure 5. SYNC Input Timing Requirements
Rev. 0 | Page 9 of 40
 

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