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AD9608BCPZRL7-105 View Datasheet(PDF) - Analog Devices

Part Name
Description
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AD9608BCPZRL7-105 Datasheet PDF : 40 Pages
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PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
CLK+ 1
CLK– 2
SYNC 3
NC 4
NC 5
NC 6
NC 7
NC 8
NC 9
DRVDD 10
D0B (LSB) 11
D1B 12
D2B 13
D3B 14
D4B 15
D5B 16
PIN 1
INDICATOR
AD9608
PARALLEL CMOS
TOP VIEW
(Not to Scale)
48 PDWN
47 OEB
46 CSB
45 SCLK/DFS
44 SDIO/DCS
43 ORA
42 D9A (MSB)
41 D8A
40 D7A
39 D6A
38 D5A
37 DRVDD
36 D4A
35 D3A
34 D2A
33 D1A
AD9608
NOTES
1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.
2. THE EXPOSED THERMAL PAD ON THE BOTTOM OF THE PACKAGE PROVIDES
THE ANALOG GROUND FOR THE PART. THIS EXPOSED PAD MUST BE
CONNECTED TO GROUND FOR PROPER OPERATION.
Figure 6. Parallel CMOS Pin Configuration (Top View)
Table 8. Pin Function Descriptions (Parallel CMOS Mode)
Pin No.
Mnemonic
Type
Description
ADC Power Supplies
10, 19, 28, 37 DRVDD
Supply
Digital Output Driver Supply (1.8 V Nominal).
49, 50, 53, 54,
59, 60, 63, 64
AVDD
Supply
Analog Power Supply (1.8 V Nominal).
4, 5, 6, 7, 8, 9, NC
25, 26, 27, 29,
30, 31
No Connect. Do not connect to this pin.
0
AGND,
Ground
The exposed thermal pad on the bottom of the package provides the analog ground
Exposed Pad
for the part. This exposed pad must be connected to ground for proper operation.
ADC Analog
51
VIN+A
Input
Differential Analog Input Pin (+) for Channel A.
52
VIN−A
Input
Differential Analog Input Pin (−) for Channel A.
62
VIN+B
Input
Differential Analog Input Pin (+) for Channel B.
61
VIN−B
Input
Differential Analog Input Pin (−) for Channel B.
55
VREF
Input/Output Voltage Reference Input/Output.
56
SENSE
Input
Reference Mode Selection.
58
RBIAS
Input/Output External Reference Bias Resistor.
57
VCM
Output
Common-Mode Level Bias Output for Analog Inputs.
1
CLK+
Input
ADC Clock Input—True.
2
CLK−
Input
ADC Clock Input—Complement.
Rev. 0 | Page 11 of 40
 

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