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88E1111 View Datasheet(PDF) - Unspecified

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88E1111 Datasheet PDF : 52 Pages
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88E1111 Product Brief
Integrated 10/100/1000 Ultra Gigabit Ethernet Transceiver
Table 8: Management Interface and Interrupt
117-TFBGA 96-BCC
Pin #
Pin #
L3
25
128-PQFP Pin Name
Pin #
35
MDC
M1
24
33
MDIO
L1
23
32
INTn
Pin
Description
Ty p e
I
3.3V
Tolerant
MDC is the management data clock refer-
ence for the serial management interface. A
continuous clock stream is not expected.
The maximum frequency supported is 8.3
MHz.
I/O
3.3V
Tolerant
MDIO is the management data. MDIO
transfers management data in and out of the
device synchronously to MDC. This pin
requires a pull-up resistor in a range from
1.5 kohm to 10 kohm.
D
The polarity of the INTn pin may be pro-
grammed at hardware reset by setting the
INT_POL bit.
Polarity:
0 = Active High
1 = Active Low
Table 9: Two-Wire Serial Interface
117-TFBGA 96-BCC
Pin #
Pin #
L3
25
128-PQFP Pin Name
Pin #
35
MDC/SCL
M1
24
33
MDIO/SDA
Pin
Ty p e
I
I/O
Description
Two-Wire Serial Interface (TWSI) serial
clock line. When the 88E1111 device is con-
nected to the bus, MDC connects to the
serial clock line (SCL).
Data is input on the rising edge of SCL, and
output on the falling edge.
TWSI serial data line. When the 88E1111
device is connected to the bus, MDIO con-
nects to the serial data line (SDA). This pin is
open-drain and may be wire-ORed with any
number of open-drain devices.
Doc. No. MV-S105540-00, Rev. --
Page 22
Document Classification: Proprietary Information
Copyright © 2009 Marvell
March 4, 2009, Advance
 

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