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GL6965 View Datasheet(PDF) - Hynix Semiconductor

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GL6965 Datasheet PDF : 23 Pages
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GL6965
3. Gain control circuit (PADC)
1) PADC terminal open state. Transmiting and receiving gains vary automatically according to the
line current amount (Auto-PAD). With the increase of line current amount; the gain attenuates by
about - 3dB at transmiting and about - 5.5dB at receiving.
2) In case PADC terminal is connected to GND by resistance. The gain begins to attenuate with the
line current amount less than that when PADC terminal is open. Set the value of resistance to be
connected at 25k§ Ùor over.
3) In case PADC terminal is connected to VCC by resistance. The gain begins to attenuate with the
line current amount more than that when PADC terminal is open.
Set the value of resistance to be connected at 10k§ Ùor over.
* Internal equivalent circuit.
5 k§ Ù
IPAD
20 k§ Ù
PIN20(VCC)
PIN12 (PADC)
4. MUTE circuit (MUTE)
The internal equivalent circuit in the MUTE terminal is a shown in the figure below. Since the
protective diode is connected between VCC and GND, avoid impressing the voltage over that of VCC
or below GND.
This is most suitable for input from the output of open drain or open collector type.
* Internal equivalent circuit.
PIN 20 (VCC)
PIN9 (MUTE)
+
-
VREF
Dialing Mode (High)
Speech Mode (High)
14
 

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