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LP339N View Datasheet(PDF) - National ->Texas Instruments

Part NameLP339N National-Semiconductor
National ->Texas Instruments National-Semiconductor
DescriptionUltra-Low Power Quad Comparator
LP339N Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage
Differential Input Voltage
Input Voltage
Power Dissipation (Note 2)
Molded DIP
Output Short Circuit to GND (Note 3)
Input Current VIN<−0.3 VDC (Note 4)
36 VDC or ±18 VDC
±36 VDC
−0.3 VDC to 36 VDC
570 mW
50 mA
Operating Temperature Range
0˚C to +70˚C
Storage Temperature Range
−65˚ to +150˚C
Soldering Information:
Dual-In-Line Package (10 sec.)
S.O. Package:
Vapor Phase (60 sec.)
Infrared (15 sec.)
See AN-450 “Surface Mounting Methods and Their Effect on
Product Reliability” for other methods of soldering surface
mount devices.
Electrical Characteristics
(V+=5 VDC) (Note 5)
Min Typ
Input Offset Voltage
Input Bias Current
Input Offset Current
Input Common
Mode Voltage Range
TA=25˚C (Note 10)
IIN(+) or IIN(−) with the
Output in the Linear Range, TA=25˚C (Note 6)
IIN(+)−IIN(−), TA=25˚C
TA=25˚C (Note 7)
Supply Current
Voltage Gain
Large Signal
Response Time
Response Time
Output Sink Current
Output Leakage Current
Input Offset Voltage
Input Offset Current
Input Bias Current
Input Common
Mode Voltage Range
RL=Infinite on all Comparators, TA=25˚C
VO = 1 VDC to 11 VDC,
RL=15 k, V+=15 VDC, TA=25˚C
VIN=TTL Logic Swing, VREF=1.4 VDC,
VRL=5 VDC, RL=5.1 k, TA=25˚C
VRL=5 VDC, RL=5.1 k, TA=25˚C (Note 8)
VIN(−)=1 VDC, VIN(+)=0, VO=2 VDC,
TA=25˚C (Note 12)
VO=0.4 VDC
VIN(+)=1 VDC, VIN(−)=0, VO=5 VDC, TA=25˚C
(Note 10)
IIN(+) or IIN(−) with Output in Linear Range
Single Supply
Output Sink Current
VIN(−)=1 VDC, VIN(+)=0, VO=2 VDC
Output Leakage Current
VIN(+)=1 VDC, VIN(−)=0, VO=30 VDC
Differential Input Voltage
All VIN’s0 VDC (or Von split supplies) (Note 9)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is func-
tional, but do not guarantee specific performance limits.
Note 2: For elevated temperature operation, Tj max is 125˚C for the LP339. θja (junction to ambient) is 175˚C/W for the LP339N and 120˚C/W for the LP339M when
either device is soldered in a printed circuit board in a still air environment. The low bias dissipation and the “ON-OFF” characteristic of the outputs keeps the chip
dissipation very small (PD 100 mW), provided the output transistors are allowed to saturate.
Note 3: Short circuits from the output to V+ can cause excessive heating and eventual destruction. The maximum output current is approximately 50 mA.
Note 4: This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP tran-
sistors becoming forward biased and thereby acting as input clamp diodes. In addition to this diode action, there is also lateral NPN parasitic transistor action on the
IC chip. This transistor action can cause the output voltage of the comparators to go to the V+ voltage level (or to ground for a large input overdrive) for the time du-
ration that an input is driven negative. This is not destructive and normal output states will re-establish when the input voltage, which is negative, again returns to a
value greater than −0.3 VDC (TA=25˚C).
Note 5: These specifications apply for V+=5VDC and 0˚CTA70˚ C, unless otherwise stated. The temperature extremes are guaranteed but not 100% production
tested. These parameters are not used to calculate outgoing AQL.
Note 6: The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output, so
no loading change exists on the reference or the input lines as long as the common-mode range is not exceeded.
Note 7: The input common-mode voltage or either input voltage should not be allowed to go negative by more than 0.3V. The upper end of the common-mode volt-
age range is V+−1.5V (TA=25˚C), but either or both inputs can go to 30 VDC without damage.
Note 8: The response time specified is for a 100 mV input step with 5 mV overdrive. For larger overdrive signals 1.3 µs can be obtained. See Typical Performance
Characteristics section.
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General Description
The LP339 consists of four independent voltage comparators designed specifically to operate from a single power supply and draw typically 60 µA of power supply drain current over a wide range of power supply voltages. Operation from split supplies is also possible and the ultra-low power supply drain current is independent of the power supply voltage. These comparators also feature a common-mode range which includes ground, even when operated from a single supply.
Applications include limit comparators, simple analog-to-digital converters, pulse, square and time delay generators; VCO’s; multivibrators; high voltage logic gates. The LP339 was specifically designed to interface with the CMOS logic family. The ultra-low supply current makes the LP339 valuable in battery powered applications.

■ Ultra-low power supply current drain
   (60 µA)— independent of the supply voltage
   (75 µW/comparator at +5 VDC)
■ Low input biasing current: 3 nA
■ Low input offset current: ±0.5 nA
■ Low input offset voltage: ±2 mV
■ Input common-mode voltage includes ground
■ Output voltage compatible with MOS and CMOS logic
■ High output sink current capability (30 mA at VO=2 VDC)
■ Supply Input protected against reverse voltages

■ Ultra-low power supply drain suitable for battery applications
■ Single supply operation
■ Sensing at ground
■ Compatible with CMOS logic family
■ Pin-out identical to LM339

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