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ADV601LC View Datasheet(PDF) - Analog Devices

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Description
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ADV601LC
ADI
Analog Devices ADI
ADV601LC Datasheet PDF : 44 Pages
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ADV601LC
Multiplexed Philips Video Timing
The diagrams in this section show transfer timing for pixel (YCrCb) data in Multiplexed Philips video mode. For line (horizontal)
and frame (vertical) data transfer timing, see Figure 25. All output values assume a maximum pin loading of 50 pF. Note that in
timing diagrams for Multiplexed Philips video, the label CTRL indicates the VSYNC, HSYNC and FIELD pins.
Table XXIII. Multiplexed Philips Video—Decode and Master Pixel (YCrCb) Timing Parameters
Parameter
tVDATA_DMM_D
tVDATA_DMM_OH
tCTRL_DMM_D
tCTRL_DMM_OH
Description
VDATA Bus, Decode Master Multiplexed Philips, Delay
VDATA Bus, Decode Master Multiplexed Philips, Output Hold
CTRL Signals, Decode Master Multiplexed Philips, Delay
CTRL Signals, Decode Master Multiplexed Philips, Output Hold
Min
Max
N/A
14
4
N/A
N/A
11
5
N/A
(O) VCLKO
(O) VDATA
(O) CTRL
VALID
t VDATA_DMM_OH
VALID
t CTRL_DMM_OH
t VDATA_DMM_D
t CTRL_DMM_D
VALID
VALID
VALID
VALID
Figure 23. Multiplexed Philips Video—Decode and Master Pixel (YCrCb) Transfer Timing
Table XXIV. Multiplexed Philips Video—Decode and Slave Pixel (YCrCb) Timing Parameters
Parameter
tVDATA_DSM_D
tVDATA_DSM_OH
tCTRL_DSM_S
tCTRL_DSM_H
Description
VDATA Bus, Decode Slave Multiplexed Philips, Delay
VDATA Bus, Decode Slave Multiplexed Philips, Output Hold
CTRL Signals, Decode Slave Multiplexed Philips, Setup
CTRL Signals, Decode Slave Multiplexed Philips, Hold
Min
Max
N/A
14
4
N/A
16
N/A
42
N/A
(O) VCLKO
(O) VDATA
(I) CTRL
VALID
t VDATA_DSM_OH
t VDATA_DSM_D
VALID
VALID
VALID
t CTRL_DSM_S
t CTRL_DSM_H
Figure 24. Multiplexed Philips Video—Decode and Slave Pixel (YCrCb) Transfer Timing
Unit
ns
ns
ns
ns
Unit
ns
ns
ns
ns
REV. 0
–35–
 

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