ADV601LC View Datasheet(PDF) - Analog Devices

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ADV601LC

Ultralow Cost Video Codec

Analog Devices 

ADV601LC

Sum of Squares [0–41] Registers

Indirect (Read Only) Register Index 0x080 through 0x0A9

The Sum of Squares [0–41] registers hold values that correspond to the summation of values (squared) in corresponding Mallat

blocks [0–41]. These registers let the Host or DSP read sum of squares statistics from the ADV601LC; using these values (with the

Sum of Value, MIN Value, and MAX Value) the host or DSP can then calculate the BW and RBW values. The ADV601LC indi-

cates that the sum of squares statistics have been updated by setting (1) the STATR bit and asserting the STAT_R pin. Read the

statistics at any time. The Host reads these values through the Host Interface.

[15:0] Sum of Squares, STS[15:0]. 16-bit values [0-41] for corresponding Mallat blocks [0-41] (undefined at reset). Sum of Square

values are 16-bit codes that represent the Most Significant Bits of values ranging from 40 bits for small blocks to 48 bits for

large blocks. The 16-bit codes have the following precision:

Blocks Precision

0–2 48.–32

3–11 46.–30

12–20 44.–28

21–29 42.–26

30–41 40.–24

Sum of Squares Precision Description

48.-bits wide, left shift code by 32-bits, and zero fill

46.-bits wide, left shift code by 30-bits, and zero fill

44.-bits wide, left shift code by 28-bits, and zero fill

42.-bits wide, left shift code by 26-bits, and zero fill

40.-bits wide, left shift code by 24-bits, and zero fill

If the Sum of Squares code were 0x0025 for block 10, the actual value would be 0x000940000000; if using that same

code, 0x0025, for block 30, the actual value would be 0x0025000000.

[31:0] Reserved (always read zero)

Sum of Luma Value Register

Indirect (Read Only) Register Index 0x0AA

The Sum of Luma Value register lets the host or DSP read the sum of pixel values for the Luma component in block 39. The Host

reads these values through the Host Interface.

[15:0] Sum of Luma, SL[15:0]. 16-bit component pixel values (undefined at reset)

[31:0] Reserved (always read zero)

Sum of Cb Value Register

Indirect (Read Only) Register Index 0x0AB

The Sum of Cb Value register lets the host or DSP read the sum of pixel values for the Cb component in block 40. The Host reads

these values through the Host Interface.

[15:0] Sum of Cb, SCB[15:0]. 16-bit component pixel values (undefined at reset)

[31:0] Reserved (always read zero)

Sum of Cr Value Register

Indirect (Read Only) Register Index 0x0AC

The Sum of Cr Value register lets the host or DSP read the sum of pixel values for the Cr component in block 41. The Host reads

these values through the Host Interface.

[15:0] Sum of Cr, SCR[15:0]. 16-bit component pixel values (undefined at reset)

[31:0] Reserved (always read zero)

MIN Luma Value Register

Indirect (Read Only) Register Index 0x0AD

The MIN Luma Value register lets the host or DSP read the minimum pixel value for the Luma component in the unprocessed data.

The Host reads these values through the Host Interface.

[15:0] Minimum Luma, MNL[15:0]. 16-bit component pixel value (undefined at reset)

[31:0] Reserved (always read zero)

MAX Luma Value Register

Indirect (Read Only) Register Index 0x0AE

The MAX Luma Value register lets the host or DSP read the maximum pixel value for the Luma component in the unprocessed

data. The Host reads these values through the Host Interface.

[15:0] Maximum Luma, MXL[15:0]. 16-bit component pixel value (undefined at reset)

[31:0] Reserved (always read zero)

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