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74HC4060D View Datasheet(PDF) - NXP Semiconductors.

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74HC4060D Datasheet PDF : 25 Pages
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NXP Semiconductors
74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
Table 6. Dynamic characteristics …continued
GND = 0 V; CL = 50 pF unless otherwise specified; for test circuit see Figure 11.
Symbol Parameter Conditions
25 °C
40 °C to +85 °C 40 °C to +125 °C Unit
Min Typ Max Min Max
Min
Max
CPD
power
VI = GND to VCC 1.5 V; [4] -
40
-
-
-
-
- pF
dissipation VCC = 5 V; fi = 1 MHz
capacitance
[1] tpd is the same as tPHL and tPLH.
[2] Qn+1 is the next Qn output.
[3] tt is the same as tTHL and tTLH.
[4] CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi × N + (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL × VCC2 × fo) = sum of outputs.
12. Waveforms
VI
RS input
GND
VOH
Q3 output
VOL
1/fmax
VM
tW
tPHL
90 %
VM
10 %
tTHL
tPLH
90 %
10 %
tTLH
001aai118
Fig 8.
Measurement points are given in Table 7.
VOL and VOH are typical voltage output levels that occur with the output load.
Waveforms showing the clock (RS) to output (Q3) propagation delays, the clock pulse width, the output
transition times and the maximum clock frequency
74HC_HCT4060_3
Product data sheet
Rev. 03 — 14 July 2008
© NXP B.V. 2008. All rights reserved.
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