datasheetbank_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

AD2S83 View Datasheet(PDF) - Analog Devices

Part Name
Description
View to exact match
AD2S83 Datasheet PDF : 19 Pages
First Prev 11 12 13 14 15 16 17 18 19
AD2S83
DIRECTION Output
The DIRECTION (DIR) output indicates the direction of the
input rotation. Any change in the state of DIR precedes the
corresponding BUSY, DATA and RIPPLE CLOCK updates.
DIR can be considered as an asynchronous output and can
make multiple changes in state between two consecutive LSB
update cycles. This occurs when the direction of rotation of the
input changes but the magnitude of the rotation is less than 1 LSB.
COMPLEMENT
The COMPLEMENT input is an active low input and is inter-
nally pulled to +VS via 100 k.
Strobing DATA LOAD and COMPLEMENT pins to logic LO
will set the logic HI bits of the AD2S83 counter to a LO state.
Those bits of the applied data which are logic LO will not
change the corresponding bits in the AD2S83 counter.
For Example:
Initial Counter State
Applied Data Word
Counter State after DATA LOAD
10101
11000
11000
Initial Counter State
Applied Data Word
Counter State after DATA LOAD and Complement
10101
11000
00101
In order to read the counter following a DATA LOAD, the
procedure below should be followed:
1. Place outputs in high impedance state (ENABLE = HI).
2. Present data to pins.
3. Pull DATA LOAD and COMPLEMENT pins to ground.
4. Wait 100 ns.
5. Remove data from pins.
6. Remove outputs from high impedance state (ENABLE =
LO).
7. Read outputs.
CIRCUIT FUNCTIONS AND DYNAMIC PERFORMANCE
The AD2S83 allows the user great flexibility in choosing the
dynamic characteristics of the resolver-to-digital conversion to
ensure the optimum system performance. The characteristics
are set by the external components shown in Figure 1. The
Component Selection section explains how to select desired
maximum tracking rate and bandwidth values. The following
paragraphs explain in greater detail the circuit of the AD2S83
and the variations in the dynamic performance available to the
user.
Loop Compensation
The AD2S83 (connected as shown in Figure 1) operates as a
Type 2 tracking servo loop where the VCO/counter combination
and Integrator perform the two integration functions inherent in
a Type 2 loop.
Additional compensation in the form of a pole/zero pair is
required to stabilize the loop.
This compensation is implemented by the integrator compo-
nents (R4, C4, R5, C5).
The overall response the converter is that of a unity gain second
order low-pass filter, with the angle of the resolver as the input
and the digital position data as the output.
The AD2S83 does not have to be connected as tracking con-
verter, parts of the circuit can be used independently. This is
particularly true of the Ratio Multiplier which can be used as a
control transformer. (For more information contact Motion
Control Applications.)
A block diagram of the AD2S83 is given in Figure 4.
SIN SIN t
COS SIN t
AC ERROR
R5 C5
C4
RATIO
MULTIPLIER
A, SIN () SIN t
PHASE
SENSITIVE
DEMODULATOR
R4
INTEGRATOR
DIGITAL
CLOCK
DIRECTION
VCO
Figure 4. Functional Diagram
R6
VELOCITY
REV. E
–11–
 

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]