Data Sheet, Rev. 2
October 2001
FW323 05
1394A PCI PHY/Link Open Host Controller Interface
Internal Registers (continued)
Interrupt Line and Pin Register
The interrupt line and pin register is used to communicate interrupt line routing information.
Table 19. Interrupt Line and Pin Register
Bit
Field
Name
15
INTR_PIN
14
13
12
11
10
9
8
7
INTR_LINE
6
5
4
3
2
1
0
Type
R
R
R
R
R
R
R
R
RW
RW
RW
RW
RW
RW
RW
RW
Default
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
Register:
Type:
Offset:
Default:
Interrupt line and pin register
Read/write
3Ch
0100h
Table 20. Interrupt Line and Pin Register Description
Bit
Field Name
Type
Description
15:8
INTR_PIN
R Interrupt Pin Register. This register returns 01h when read, indi-
cating that the FW323 PCI function signals interrupts on the INTA pin.
7:0
INTR_LINE
RW Interrupt Line Register. This register is programmed by the system
and indicates to software to which interrupt line the FW323 INTA is
connected.
Agere Systems Inc.
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