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CXK591000TM-10LL View Datasheet(PDF) - Sony Semiconductor

Part NameDescriptionManufacturer
CXK591000TM-10LL 131,072-word ×9-bit High Speed CMOS Static RAM Sony
Sony Semiconductor Sony
CXK591000TM-10LL Datasheet PDF : 13 Pages
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CXK591000TM/YM/M
• Read cycle (WE = "H")
-55LL
-70LL
-10LL
Item
Symbol
Unit
Min. Max. Min. Max. Min. Max.
Read cycle time
tRC
55 — 70 — 100 — ns
Address access time
tAA
— 55 — 70 — 100 ns
Chip enable access time (CE1)
tCO1
— 55 — 70 — 100 ns
Chip enable access time (CE2)
tCO2
— 55 — 70 — 100 ns
Output enable to output valid
tOE
— 30 — 40 — 50 ns
Output hold from address change
tOH
15 — 15 — 15 — ns
Chip enable to output in low Z (CE1, CE2) tLZ1, tLZ2
10
10
10
— ns
Output enable to output in low Z (OE)
tOLZ
5
5
5 — ns
Chip disable to output in high Z (CE1, CE2) tHZ1, tHZ2
25
25
— 35 ns
Output disable to output in high Z (OE)
tOHZ
— 25 — 25 — 35 ns
tHZ1, tHZ2 and tOHZ are defined as the time required for outputs to turn to high impedance state and are not
referred to as output voltage levels.
• Write cycle
Item
Write cycle time
Address valid to end of write
Chip enable to end of write
Data to write time overlap
Data hold from write time
Write pulse width
Symbol
tWC
tAW
tCW
tDW
tDH
tWP
-55LL
Min. Max.
55 —
50 —
50 —
25 —
0
40 —
-70LL
Min. Max.
70 —
60 —
60 —
30 —
0
50 —
-10LL
Unit
Min. Max.
100 — ns
70 — ns
70 — ns
40 — ns
0 — ns
60 — ns
Address setup time
tAS
0
0
0 — ns
Write recovery time (WE)
tWR
0
0
0 — ns
Write recovery time (CE1, CE2)
tWR1
0
0
0 — ns
Output active from end of write
tOW
10 — 10 — 10 — ns
Write to output in high Z
tWHZ
— 25 — 25 — 30 ns
tWHZ is defined as the time required for outputs to turn to high impedance state and is not referred to as
output voltage level.
–5–
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