MITSUBISHI MICROCOMPUTERS
3874 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Internal system clock φ
SYNC
Address bus
Data bus
Interrupt request signal input
IREQINx
Interrupt request signal
IREQx
PC
S,SPS S-1,SPS S-2,SPS
Not used
PCH
PCL
PS
IRGET
Management after
interrupt acceptance
(A)
(B)
(a) One factor/one vector interrupt
Internal system clock φ
SYNC
Address bus
Data bus
Interrupt source determination
request signal input
IDREQINY
Interrupt request signal from
interrupt source
IDREQY
Interrupt request signal
IREQY
PC
Not used
IRGET
Management after
(C)
(D)
interrupt acceptance
2 to 16 cycles of φ
(E)
(b) Multiple factors/one vector interrupt
Fig.19 Timing from occurrence to acceptance of interrupt
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