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M37754FFCGP View Datasheet(PDF) - MITSUBISHI ELECTRIC

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M37754FFCGP Datasheet PDF : 68 Pages
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MITSUBISHI MICROCOMPUTERS
M37754FFCGP
M37754FFCHP
SHINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION
PIN DESCRIPTION (MICROCOMPUTER MODE)
Pin
Name
Input/
Output
Functions
VCC, VSS Power supply
Supply 5 V±10 % to VCC and 0 V to VSS.
CNVSS
_____
RESET
CNVSS input
Reset input
Input
Input
This pin controls the processor mode. Connect to VSS for single-chip mode or
memory expansion mode. Connect to VCC for microprocessor mode.
This is reset input pin. The microcomputer is reset when supplying “L” level to this
pin.
XIN
XOUT
__
E
Clock input
Clock output
Enable output
Input
Output
Output
These are I/O pins of internal clock generating circuit.Connect a ceramic or quartz-
crystal resonator between XIN and XOUT. When an external clock is used, the clock
source should be connected to the XIN pin and the XOUT pin should be left open.
__
This pin outputs enable signal E, which indicates access state of data bus for
single-chip mode_.__
This pin outputs RD signal for memory expansion mode or microprocessor mode.
BYTE
(Note)
Bus width select input
Input
This pin determines whether the external data bus is 8-bit width or 16-bit width for
memory expansion mode or microprocessor mode. The width is 16 bits when “L”
signal inputs and 8 bits when “H” signal inputs.
AVCC,
AVSS
Analog supply input
Power supply for the A-D converter and the D-A converter. Connect AVCC to VCC
and AVSS to VSS externally.
VREF
Reference voltage input
Input This is reference voltage input pin for the A-D converter and the D-A converter.
P00–P07 I/O port P0
I/O In single-chip mode, port P0 is an 8-bit I/O port. This port has an I/O direction
register and each pin can be programmed for input or output. These ports are in
the input mode when reset. Address (A0 - A7) is output in memory expansion mode
or microprocessor mode.
P10–P17 I/O port P1
I/O In single-chip mode, these pins have the same functions as port P0. Address (A8 -
A15) is output in memory expansion mode or microprocessor mode.
P20–P23, I/O port P2
P27
I/O In single-chip mode, these pins have the same functions as port P0. Address (A16 -
A19, A23) is output in memory expansion mode or microprocessor mode.
P30–P33 I/O port P3
I/O In single-chip mode, these pins have the sa_m__e f_u_n_c_tions as port_P__0_. _In memory
expansion mode or microprocessor mode, WR, BHE, ALE, and HLDA signals are
output.
P40–P47 I/O port P4
I/O In single-chip mode, these pins have the same functions as port P0. In_m__ e_ m_ory
_e_x_p_ansion mode or microprocessor mode, P40, P41, and P42 become HOLD and
RDY input pins, and clock φ1 output pin respectively. Functions of other pins are
the same as in single-chip mode. In memory expansion mode, P42 can be
programmed as I/O port.
P50–P57 I/O port P5
I/O In addition to having the same functions as port P0 in single-chip mode, these pins
also function as I/O pins for timer A0, timer A1, timer A2, timer A3, output pins for
motor drive waveform, and input pins for key input interrupt.
P60–P67 I/O port P6
I/O In addition to having the same functions as port P0 in single-chip mode, the_s_e__pins
_a_ls_o_functi_o_n_a_s I/O pins for timer A4, input pins for external interrupt input INT0,
INT1, and INT2, and input pins for timer B0, timer B1, and timer B2.
P70–P77 I/O port P7
I/O In addition to having the same functions as port P0 in single-chip mode, these pins
also function as input pins for A-D converter.
P80–P87 I/O port P8
I/O In addition to having the same functions as port P0 in single-chip mode, these pins
also function_a_s__I/O pins for UART0, UART1, output pins for D-A converter, and
input pin for INT4.
P90–P95 I/O port P9
I/O In addition to having the same__fu_nctions as port P0 in single-chip mode, these pins
also function as input pin for INT3, output pins for motor drive waveform.
In memory expansion mode and microprocessor mode_,_t_hese__p_ins can be
programmed as address (A20 - A22) or output pins for CS0 – CS4
Note: It is impossible to change the input level of the BYTE pin in each bus cycle. In other words, bus width cannot be switched dynamically. Fix the input
level of the BYTE pin to “H” or “L” according to the bus width used.
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