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M37754FFCGP View Datasheet(PDF) - MITSUBISHI ELECTRIC

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M37754FFCGP Datasheet PDF : 68 Pages
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MITSUBISHI MICROCOMPUTERS
M37754FFCGP
M37754FFCHP
SHINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION
FLASH MEMORY MODE
The M37754FFCGP and the M37754FFCHP have the flash memory
mode in addition to the normal operation mode (microcomputer
mode). The user can use this mode to perform read, program, and
erase operations for the internal flash memory.
The M37754FFCGP and the M37754FFCHP have three modes the
user can choose: the parallel input/output and serial input/output
mode, where the flash memory is handled by using the external pro-
grammer, and the CPU reprogramming mode, where the flash
memory is handled by the central processing unit (CPU). The follow-
ing explains these modes.
Flash memory mode 1 (parallel I/O mode)
The parallel I/O mode can be selected by connecting wires as shown
in Figures 6, 7 and supplying power to the VCC and VPP pins. In this
mode, the M37754FFCGP and the M37754FFCHP operate as an
equivalent of MITSUBISHI’s CMOS flash memory M5M28F101.
However, because the M37754FFCGP and the M37754FFCHP’s in-
ternal memory has a capacity of 120 Kbytes, programming is avail-
able for addresses 0100016 to 1EFFF16, and make sure that the data
in addresses 0000016 to 00FFF16 and addresses 1F00016 to
1FFFF16 are FF16. Note also that the M37754FFCGP and the
M37754FFCHP does not contain a facility to read out a device iden-
tification code by applying a high voltage to address input (A9). Be
careful not to erratically set program conditions when using a gen-
eral-purpose PROM programmer.
Table 1 shows the pin assignments when operating in the parallel
input/output mode.
Table 1. Pin assignments of M37754FFCGP and M37754FFCHP
when operating in the parallel input/output mode
VCC
VPP
VSS
Address input
Data I/O
__
CE
___
OE
___
WE
M37754FFCGP/CHP
VCC
CNVSS
VSS
Ports P0, P1, P54
Port P10
P52
P51
P50
M5M28F101
VCC
VPP
VSS
A0–A16
D0–D7
__
CE
__
OE
___
WE
Functional outline (Parallel input/output
mode)
In the parallel input/output mode, the M37754FFCGP and the
M37754FFCHP allows the user to choose an operation mode be-
tween the read-only mode and the read/write mode (software com-
mand control mode) depending on the voltage applied to the VPP pin.
When VPP = VPPL, the read-only mode is selected, and the user can
choose one of three states (e.g., read, output disable, or standby) de-
___ ___
___
pending on inputs to the CE, OE, and WE pins. When VPP = VPPH,
the read/write mode is selected, and the user can choose one of four
states (e.g., read, output disable, standby, or write) depending on in-
__ __
___
puts to the CE, OE, and WE pins. Table 2 shows assignment states
of control input and each state.
Read
__
__
The microcomputer enters the read state by driving the CE, and OE
___
pins low and the WE pin high; and the contents of memory corre-
sponding to the address to be input to address input pins (A0–A16).
are output to the data input/output pins (D0–D7).
Output disable
__
The microcomputer enters the output disable state by driving the CE
___
__
pin low and the WE and OE pins high; and the data input/output pins
enter the floating state.
Standby
__
The microcomputer enters the standby state by driving the CE pin
high. The M37754FFCGP and the M37754FFCHP are placed in a
power-down state consuming only a minimal supply current. At this
time, the data input/output pins enter the floating state.
Write
The microcomputer enters the write state by driving the VPP pin high
___
__
(VPP = VPPH) and then the WE pin low when the CE pin is low and
__
the OE pin is high. In this state, software commands can be input
from the data input/output pins, and the user can choose program or
erase operation depending on the contents of this software com-
mand.
Table 2. Assignment sates of control input and each state
Pin
__
__
Mode
State
CE
OE
Read
VIL
VIL
Read-only Output disable
VIL
VIH
Standby
VIH
×
Read
VIL
VIL
Read/Write Output disable
Standby
VIL
VIH
VIH
×
Write
VIL
VIH
Note: × can be VIL or VIH.
___
WE
VIH
VIH
×
VIH
VIH
×
VIL
VPP
VPPL
VPPL
VPPL
VPPH
VPPH
VPPH
VPPH
Data I/O
Output
Floating
Floating
Output
Floating
Floating
Input
15
 

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