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AD73311L View Datasheet(PDF) - Analog Devices

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AD73311L Datasheet PDF : 36 Pages
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TFS
DT
ADSP-218x
DSP
SCLK
DR
RFS
FL0
FL1
SDIFS
SDI
SCLK
SDO
SDOFS
RESET
SE
AD73311L
CODEC
Figure 34. AD73311L Connected to ADSP-218x
FSX
DT
CLKX
TMS320C5x
DSP
CLKR
DR
FSR
XF
SDIFS
SDI
SCLK
SDO
SDOFS
RESET
SE
AD73311L
CODEC
AD73311L
complete the cascade. SE and RESET on all devices are fed
from the signals that were synchronized with the MCLK using
the circuit as described above. The SCLK from only one device
need be connected to the DSPs SCLK input(s) as all devices
will be running at the same SCLK frequency and phase.
TFS
DT
ADSP-218x SCLK
DSP
DR
RFS
SDIFS
MCLK
SDI
SCLK
SDO
SDOFS
AD73311L
CODEC
DEVICE 1
SE
RESET
FL0 FL1
SDIFS
SDI
SCLK
SDO
SDOFS
AD73311L
CODEC
DEVICE 2
MCLK
SE
RESET
D1
Q1
D2 74HC74 Q2
Figure 35. AD73311L Connected to TMS320C5x
Cascade Operation
Where it is required to congure a cascade of up to eight
devices, it is necessary to ensure that the timing of the SE and
RESET signals are synchronized at each device in the cascade.
A simple D-type flip-flop is sufcient to sync each signal to the
master clock MCLK, as in Figure 36.
DSP CONTROL
TO SE
MCLK
D
Q
1/2
74HC74
CLK
SE SIGNAL SYNCHRONIZED
TO MCLK
DSP CONTROL
TO RESET
MCLK
D
Q
1/2
74HC74
CLK
RESET SIGNAL SYNCHRONIZED
TO MCLK
Figure 36. SE and RESET Sync Circuit for Cascaded
Operation
Connection of a cascade of devices to a DSP, as shown in Fig-
ure 37, is no more complicated than connecting a single device.
Instead of connecting the SDO and SDOFS to the DSPs Rx
port, these are now daisy-chained to the SDI and SDIFS of the
next device in the cascade. The SDO and SDOFS of the nal
device in the cascade are connected to the DSPs Rx port to
Figure 37. Connection of Two AD73311Ls Cascaded to
ADSP-218x
Grounding and Layout
Since the analog inputs to the AD73311L are differential, most
of the voltages in the analog modulator are common-mode
voltages. The excellent common-mode rejection of the part will
remove common-mode noise on these inputs. The analog and
digital supplies of the AD73311L are independent and separately
pinned out to minimize coupling between analog and digital
sections of the device. The digital lters on the encoder section
will provide rejection of broadband noise on the power supplies,
except at integer multiples of the modulator sampling frequency.
The digital lters also remove noise from the analog inputs
provided the noise source does not saturate the analog modula-
tor. However, because the resolution of the AD73311s ADC is
high, and the noise levels from the AD73311L are so low, care
must be taken with regard to grounding and layout.
The printed circuit board that houses the AD73311L should be
designed so the analog and digital sections are separated and
conned to certain sections of the board. The AD73311L pin
conguration offers a major advantage in that its analog and
digital interfaces are connected on opposite sides of the package.
This facilitates the use of ground planes that can be easily
separated, as shown in Figure 38. A minimum etch technique
is generally best for ground planes as it gives the best shielding.
Digital and analog ground planes should be joined in only one
place. If this connection is close to the device, it is recommended
to use a ferrite bead inductor as shown in Figure 38.
REV. A
–25–
 

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