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ADF4117BRUZ1 View Datasheet(PDF) - Analog Devices

Part Name
Description
View to exact match
ADF4117BRUZ1
ADI
Analog Devices ADI
ADF4117BRUZ1 Datasheet PDF : 20 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ADF4116/ADF4117/ADF4118
Parameter
B Version B Chips2 Unit
Test Conditions/Comments
NOISE CHARACTERISTICS
ADF4118 Phase Noise Floor7
Phase Noise Performance8
ADF41169 540 MHz Output
ADF411710 900 MHz Output
ADF411810 900 MHz Output
ADF411711 836 MHz Output
ADF411812 1750 MHz Output
ADF411813 1750 MHz Output
ADF411814 1960 MHz Output
–170
–162
–89
–87
–90
–78
–85
–65
–84
–170
–162
–89
–87
–90
–78
–85
–65
–84
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
@ 25 kHz PFD Frequency
@ 200 kHz PFD Frequency
@ VCO Output
@ 1 kHz Offset and 200 kHz PFD Frequency
Note 15
Note 15
@ 300 Hz Offset and 30 kHz PFD Frequency
@ 1 kHz Offset and 200 kHz PFD Frequency
@ 200 Hz Offset and 10 kHz PFD Frequency
@ 1 kHz Offset and 200 kHz PFD Frequency
Spurious Signals
ADF41169 540 MHz Output
ADF411710 900 MHz Output
ADF411810 900 MHz Output
ADF411711 836 MHz Output
ADF411812 1750 MHz Output
ADF411813 1750 MHz Output
ADF411814 1960 MHz Output
–88/–99
–90/–104
–91/–100
–80/–84
–88/–90
–65/–73
–80/–86
–88/–99
–90/–104
–91/–100
–80/–84
–88/–90
–65/–73
–80/–86
dBc typ
dBc typ
dBc typ
dBc typ
dBc typ
dBc typ
dBc typ
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
Note 15
Note 15
@ 30 kHz/60 kHz and 30 kHz PFD Frequency
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
@ 10 kHz/20 kHz and 10 kHz PFD Frequency
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
NOTES
1Operating temperature range is as follows: B Version: –40°C to +85°C.
2The B Chip specifications are given as typical values.
3This is the maximum operating frequency of the CMOS counters.
4AVDD = DVDD = 3 V; for AVDD = DVDD = 5 V, use CMOS-compatible levels.
5Guaranteed by design. Sample tested to ensure compliance.
6AVDD = DVDD = 3 V; RFIN for ADF4116 = 540 MHz; RFIN for ADF4117, ADF4118 = 900 MHz.
7The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 log N (where N is the N divider
value).
8The phase noise is measured with the EVAL-ADF411xEB Evaluation Board and the HP8562E Spectrum Analyzer. The spectrum analyzer provides the REFIN for
the synthesizer (fREFOUT = 10 MHz @ 0 dBm).
9fREFIN = 10 MHz; fPFD = 200 kHz; Offset frequency = 1 kHz; fRF = 540 MHz; N = 2700; Loop B/W = 20 kHz.
10fREFIN = 10 MHz; fPFD = 200 kHz; Offset frequency = 1 kHz; fRF = 900 MHz; N = 4500; Loop B/W = 20 kHz.
11fREFIN = 10 MHz; fPFD = 30 kHz; Offset frequency = 300 Hz; fRF = 836 MHz; N = 27867; Loop B/W = 3 kHz.
12fREFIN = 10 MHz; fPFD = 200 kHz; Offset frequency = 1 kHz; fRF = 1750 MHz; N = 8750; Loop B/W = 20 kHz.
13fREFIN = 10 MHz; fPFD = 10 kHz; Offset frequency = 200 Hz; fRF = 1750 MHz; N = 175000; Loop B/W = 1 kHz.
14fREFIN = 10 MHz; fPFD = 200 kHz; Offset frequency = 1 kHz; fRF = 1960 MHz; N = 9800; Loop B/W = 20 kHz.
15Same conditions as above.
Specifications subject to change without notice.
TIMING CHARACTERISTICS1 (AVDD = DVDD = 3 V ؎ 10%, 5 V ؎ 10%; AVDD VP < 6.0 V; AGND = DGND = CPGND = 0 V;
TA = TMIN to TMAX unless otherwise noted)
Parameter
Limit at TMIN to TMAX
(B Version)
Unit
Test Conditions/Comments
t1
10
t2
10
t3
25
t4
25
t5
10
t6
20
NOTE
1Guaranteed by design but not production tested.
Specifications subject to change without notice.
ns min
ns min
ns min
ns min
ns min
ns min
DATA to CLOCK Setup Time
DATA to CLOCK Hold Time
CLOCK High Duration
CLOCK Low Duration
CLOCK to LE Setup Time
LE Pulsewidth
REV. 0
–3–
 

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