datasheetbank_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

ADF4117BRUZ1 View Datasheet(PDF) - Analog Devices

Part Name
Description
View to exact match
ADF4117BRUZ1
ADI
Analog Devices ADI
ADF4117BRUZ1 Datasheet PDF : 20 Pages
First Prev 11 12 13 14 15 16 17 18 19 20
ADF4116/ADF4117/ADF4118
ADuC812 Interface
Figure 29 shows the interface between the ADF4116 family and
the ADuC812 microconverter. Since the ADuC812 is based on
an 8051 core, this interface can be used with any 8051-based
microcontroller. The microconverter is set up for SPI Master
Mode with CPHA = 0. To initiate the operation, the I/O port
driving LE is brought low. Each latch of the ADF4116 family
needs a 24-bit word. This is accomplished by writing three 8-bit
bytes from the microconverter to the device. When the third
byte has been written the LE input should be brought high to
complete the transfer.
When operating in the mode described, the maximum SCLOCK
rate of the ADuC812 is 4 MHz. This means that the maximum
rate at which the output frequency can be changed will be 166 kHz.
ADSP-2181 Interface
Figure 30 shows the interface between the ADF4116 family and
the ADSP-21xx Digital Signal Processor. The ADF4116 family
needs a 21-bit serial word for each latch write. The easiest way
to accomplish this using the ADSP-21xx family is to use the
Autobuffered Transmit Mode of operation with Alternate Fram-
ing. This provides a means for transmitting an entire block of
serial data before an interrupt is generated.
SCLOCK
ADuC812
MOSI
I/O PORTS
SCLK
SDATA
LE
CE
ADF4116/
ADF4117/
ADF4118
MUXOUT
(LOCK DETECT)
Figure 29. ADuC812 to ADF4116 Family Interface
On first applying power to the ADF4116 family, it needs three
writes (one each to the R counter latch, the N counter latch and
the initialization latch) for the output to become active.
I/O port lines on the ADuC812 are also used to control power-
down (CE input) and to detect lock (MUXOUT configured as
lock detect and polled by the port input).
SCLK
ADSP-21xx
DT
TFS
I/O FLAGS
SCLK
SDATA
LE
CE
ADF4116/
ADF4117/
ADF4118
MUXOUT
(LOCK DETECT)
Figure 30. ADSP-21xx to ADF4116 Family Interface
Set up the word length for 8 bits and use three memory loca-
tions for each 24-bit word. To program each 21-bit latch, store
the three 8-bit bytes, enable the Autobuffered mode and then
write to the transmit register of the DSP. This last operation
initiates the autobuffer transfer.
Chip Scale
(CP-20)
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
Thin Shrink Small Outline
(RU-16)
0.159 (4.05)
0.157 (4.00)
0.156 (3.95)
0.159 (4.05)
0.157 (4.00)
0.156 (3.95)
TOP VIEW
0.039 (1.00)
0.035 (0.90)
0.031 (0.80)
SEATING 0.0079 (0.20)
PLANE
REF
0.079 (2.0) REF
0.018 (0.45)
0.016 (0.40) 16
0.014 (0.35) 15
DETAIL E
0.020 (0.5) REF
LEAD PITCH
11
10
0.014 (0.35) ؋ 45°
20
1
0.079
(2.0)
REF
5
6
0.0083 (0.211)
0.0079 (0.200)
0.0077 (0.195)
BOTTOM VIEW
(ROTATED 180؇)
LEAD OPTION
DETAIL E
0.011 (0.275)
0.010 (0.250)
0.009 (0.225)
0.018 (0.45)
0.016 (0.40)
0.014 (0.35)
0.0059
(0.15)
REF
0.0059 (0.15)
REF
CONTROLLING DIMENSIONS ARE IN MILLIMETERS
0.201 (5.10)
0.193 (4.90)
16
1
PIN 1
0.006 (0.15)
0.002 (0.05)
9
0.177 (4.50)
0.169 (4.30)
0.256 (6.50)
0.246 (6.25)
8
0.0433 (1.10)
MAX
8؇
SEATING
PLANE
0.0256 (0.65)
BSC
0.0118 (0.30)
0.0075 (0.19)
0.0079 (0.20) 0؇
0.0035 (0.090)
0.028 (0.70)
0.020 (0.50)
20
REV. 0
 

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]