|SN74LVC1G32DBVT||Single 2-Input Positive-OR Gate|
|SN74LVC1G32DBVT Datasheet PDF : 17 Pages |
SINGLE 2ĆINPUT POSITIVEĆOR GATE
SCES219N − APRIL 1999 − REVISED JUNE 2005
D Available in the Texas Instruments
NanoStar and NanoFree Packages
D Supports 5-V VCC Operation
D Inputs Accept Voltages to 5.5 V
D Max tpd of 3.6 ns at 3.3 V
D Low Power Consumption, 10-µA Max ICC
D ±24-mA Output Drive at 3.3 V
D Ioff Supports Partial-Power-Down Mode
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
YEA, YEP, YZA,
OR YZP PACKAGE
5 VCC GND 3 4 Y
GND 3 4 Y
A 1 5 VCC
See mechanical drawings for dimensions.
This single 2-input positive-OR gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC1G32 performs the Boolean function Y + A ) B or Y + A • B in positive logic.
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 2005, Texas Instruments Incorporated
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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