NXP Semiconductors
Silicon N-channel dual-gate MOS-FETs
Product specification
BF998; BF998R
30
handbook, halfpage
|yfs|
(mS)
24
18
12
6
0
−1
MGE812
VG2-S = 4 V
3V
2V
1V
0V
0
1
VG1 (V)
VDS = 8 V; Tamb = 25 C.
Fig.9 Forward transfer admittance as a function of
gate 1 voltage; typical values.
1.5
handbook, halfpage
Cos
(pF)
1.4
1.3
1.2
1.1
1.0
4
6
MGE810
12 mA
10 mA
8 mA
8
10
12
14
VDS (V)
VG2-S = 4 V; f = 1 MHz; Tamb = 25 C.
Fig.10 Output capacitance as a function of
drain-source voltage; typical values.
2.3
handbook, halfpage
Cis
(pF)
2.1
1.9
1.7
1.5
1.3
−2.4
−1.6
−0.8
MGE809
0
0.8
VG1-S (V)
handbook2, .h4alfpage
Cis
(pF)
2.3
MBH479
2.2
2.1
2.0
6
4
2
0
−2
VG2−S (V)
VDS = 8 V; VG2-S = 4 V; f = 1 MHz; Tamb = 25 C.
Fig.11 Gate 1 input capacitance as a function of
gate 1-source voltage; typical values.
VDS = 8 V; VG1-S = 0 V; f = 1 MHz; Tamb = 25 C.
Fig.12 Gate 1 input capacitance as a function of
gate 2-source voltage; typical values.
1996 Aug 01
6