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ADC0831CCN View Datasheet(PDF) -

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ADC0831CCN
 
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ML2281, ML2282, ML2284, ML2288
17
DI*
CS 18
R
START
R
R
R
5-BIT SHIFT-REGISTER
ODD/
SGL/DIF SIGN SELECT 1
R
D
SELECT 0 C
16
CLK
VCC
MUX
ADDRESS NOTE 1
NOTE 1
1
CH0*
2
CH1*
3
CH2
4
CH3
5
CH4*
6
CH5*
7
CH6*
8
CH7*
9
COM*
12
VREF
VCC 20
V+*
DGND*
AGND*
+Σ
ANALOG
+
MUX
(EQUIVALENT)
C
COMP
C
R
7V SHUNT
REGULATOR
TO INTERNAL R
CIRCUITRY
INPUT
13
VCC
16
TO
17
INTERNAL
18
CIRCUITS
LADDER
AND
DECODER
INPUT PROTECTION—ALL LOGIC INPUTS
SAR
LOGIC
AND
LATCH
COMP
CS
START
TD
TIME
DELAY
DSTART 2
13
SE*
CS
SARS*
15
CS
CR
QD
DQ
CR
CS
D Q DEOC
DSTART 1
CR
CS
CS
CS
C
CS
R
Q
14
DO
B7
EOC
D
RC
B6
B5
B4
9-BIT
SHIFT
B3
REGISTER
B2
B1
B0
EOC
LSB FIRST
MSB FIRST
PARALLEL XFR
TO SHIFT REGISTER
*SOME OF THESE FUNCTIONS/PINS ARE NOT AVAILABLE WITH OTHER OPTIONS.
NOTE 1: FOR THE ML2284 DI IS INPUT DIRECTLY TO THE D INPUT OF SELECT 1. SELECT 0 IS FORCED TO A “1”. FOR THE ML2282, DI IS INPUT DIRECTLY TO THE D
INPUT OF ODD/SIGN. SELECT 0 IS FORCED TO A “1” AND SELECT 1 IS FORCED TO A “0”.
Figure 6. ML2288 Functional Block Diagram
11
 

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