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M38860E1A-XXXGP View Datasheet(PDF) -

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M38860E1A-XXXGP
 
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MITSUBISHI MICROCOMPUTERS
3886 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Serial I/O2
The serial I/O2 function can be used only for clock synchronous
serial I/O.
For clock synchronous serial I/O the transmitter and the receiver
must use the same clock. If the internal clock is used, transfer is
started by a write signal to the serial I/O2 register.
[Serial I/O2 Control Register (SIO2CON)]
001D16
The serial I/O2 control register contains seven bits which control
various serial I/O functions.
b7
b0
Serial I/O2 control register
(SIO2CON : address 001D16)
Internal synchronous clock selection bits
b2 b1 b0
0 0 0: f(XIN)/8 (f(XCIN)/8 in low-speed mode)
0 0 1: f(XIN)/16 (f(XCIN)/16 in low-speed mode)
0 1 0: f(XIN)/32 (f(XCIN)/32 in low-speed mode)
0 1 1: f(XIN)/64 (f(XCIN)/64 in low-speed mode)
1 1 0: f(XIN)/128 (f(XCIN)/128 in low-speed mode)
1 1 1: f(XIN)/256 (f(XCIN)/256 in low-speed mode)
Serial I/O2 port selection bit
0: I/O port
1: SOUT2,SCLK2 signal output
SRDY2 output enable bit
0: I/O port
1: SRDY2 signal output
Transfer direction selection bit
0: LSB first
1: MSB first
Serial I/O2 synchronous clock selection bit
0: External clock
1: Internal clock
Comparator reference input selection bit
0: P00/P3REF input
1: Reference input fixed
Fig. 26 Structure of serial I/O2 control register
XCIN
Main clock divide ratio “10”
selection bits (Note)
“00”
XIN
“01”
1/8
1/16
1/32
1/64
1/128
1/256
Internal synchronous
clock selection bits
Data bus
P73/SRDY2
/INT21
P73 latch
Serial I/O2 synchronous
“0”
clock selection bit “1”
SRDY2 Synchronization
“1”
circuit
SRDY2 output enable bit
“0”
P72/SCLK2
P72 latch
“0”
“1”
Serial I/O2 port selection bit
P71/SOUT2
P71 latch
“0”
“1”
Serial I/O2 port selection bit
P70/SIN2
External clock
Serial I/O counter 2 (3)
Serial I/O2 register (8)
Serial I/O2
interrupt request
Note: These are assigned to bits 7 and 6 of the CPU mode register (address 003B16).
These bits select any of the high-speed mode, the middle-speed mode, and the low-speed mode.
Fig. 27 Block diagram of serial I/O2 function
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